Nickel-silicide process for ultra-thin-body SOI-MOSFETs
2005 (English)In: Microelectronic Engineering, ISSN 0167-9317, Vol. 82, no 3-4, 497-502 p.Article in journal (Refereed) Published
A self-aligned nickel-silicide process to reduce parasitic source and drain resistances in ultra-thin-body silicon-on-insulator (UTB-SOI)-MOSFETs is investigated. An optimized nickel-silicide process sequence including nickel sputter deposition, rapid thermal diffusion and compatible silicon nitride (Si3N4) spacers is demonstrated in UTB-SOI n-MOSFETs. Transistor on-currents and source/drain-resistivity are extracted from output and transfer characteristics and compared for various device layer thicknesses from 80 nm down to 15 nm. On-currents are improved up to a factor of 100 for the thinnest transistors by the introduction of self-aligned NiSi. Front and back gate interface qualities are extracted to evaluate their potential impact on mobility and on-currents specifically for ultra-thin devices.
Place, publisher, year, edition, pages
2005. Vol. 82, no 3-4, 497-502 p.
nickel silicide, salicide, ultra-thin-body (UTB), SOI-MOSFET
IdentifiersURN: urn:nbn:se:kth:diva-50530DOI: 10.1016/j.mee.2005.07.049ISI: 000234236100047OAI: oai:DiVA.org:kth-50530DiVA: diva2:495377
QC 201202272012-02-082011-12-062012-02-27Bibliographically approved