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Nanoscale TiN metal gate technology for CMOS integration
AMO GmbH, AMICA, Aachen, Germany.
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2006 (English)In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 83, no 4-9, 1551-1554 p.Article in journal (Refereed) Published
Abstract [en]

A TiN metal gate technology including essential natiostructuring process steps is investigated. Complex interdependencies of material deposition, nanolithography, nanoscale etching and post fabrication annealing are taken into account. First, a reactive sputter process has been optimized for plasma damage and stoichiometry. Then, a two step etch process that yields both anisotropy and selectivity has been identified. Finally, MOS-capacitors with TiN/SiO2 gate stacks fabricated with this technology have been exposed to rapid thermal annealing steps. TiN/SiO2 interfaces are chemically stable up to 800 degrees C and yield excellent CV and IV characteristics.

Place, publisher, year, edition, pages
2006. Vol. 83, no 4-9, 1551-1554 p.
Keyword [en]
nanoelectronics, metal gate, RIE etching, nanostructuring, TiN
National Category
Nano Technology
Identifiers
URN: urn:nbn:se:kth:diva-50524DOI: 10.1016/j.mee.2006.01.161ISI: 000237581900225OAI: oai:DiVA.org:kth-50524DiVA: diva2:495383
Note
QC 20120222Available from: 2012-02-08 Created: 2011-12-06 Last updated: 2017-12-07Bibliographically approved

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Lemme, Max C.
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