Subthreshold behavior of triple-gate MOSFETs on SOI material
2004 (English)In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 48, no 4, 529-534 p.Article in journal (Refereed) Published
The fabrication of n-type multi-wire MOSFETs on SOI material with triple-gate structures is presented. The output and transfer characteristics of devices with a gate length of 70 nm and a MESA width of 22 nm demonstrate clearly the suppression of short channel effects (SCE). In addition, these triple-gate structures are compared with planar SOI devices of comparable dimensions. The influence of biasing the substrate (back gate) is analyzed and compared to simulation data.
Place, publisher, year, edition, pages
2004. Vol. 48, no 4, 529-534 p.
triple-gate, FinFET, multi-gate, SOI, back gate bias
IdentifiersURN: urn:nbn:se:kth:diva-50517DOI: 10.1016/j.sse.2003.09.027ISI: 000220009700006OAI: oai:DiVA.org:kth-50517DiVA: diva2:495388
QC 201202222012-02-082011-12-062012-02-22Bibliographically approved