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0.86-nm CET gate stacks with epitaxial Gd2O3 high-k dielectrics and FUSINiSi metal electrodes
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2006 (English)In: IEEE Electron Device Letters, ISSN 0741-3106, E-ISSN 1558-0563, Vol. 27, no 10, 814-816 p.Article in journal (Refereed) Published
Abstract [en]

In this letter, ultrathin gadolinium oxide (Gd2O3) high-kappa gate dielectrics with complementary-metal-oxide-semiconductor (CMOS)-compatible fully silicided nickel-silicide metal gate electrodes are reported for the first time. MOS capacitors with a Gd2O3 thickness of 3.1 nm yield a capacitance equivalent oxide thickness of CET = 0.86 nm. The extracted dielectric constant is kappa =-13-14. Leakage currents and equivalent oxide thicknesses of this novel gate stack meet the International Technology Roadmap for Semiconductors targets for the near term schedule and beyond.

Place, publisher, year, edition, pages
2006. Vol. 27, no 10, 814-816 p.
Keyword [en]
epitaxial dielectric, fully silicided (FUSI), Gd2O3, high-k, metal gate, NiSi, rare earth oxide
National Category
Nano Technology
Identifiers
URN: urn:nbn:se:kth:diva-50512DOI: 10.1109/LED.2006.882581ISI: 000240925900008OAI: oai:DiVA.org:kth-50512DiVA: diva2:495396
Note
QC 20120229Available from: 2012-02-08 Created: 2011-12-06 Last updated: 2017-12-07Bibliographically approved

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Lemme, Max C.
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