Design Approach for Return-Loss Optimisation of Multi-Stage Millimetre-Wave MEMS Dielectric-Block Phase Shifters
2012 (English)In: IET Microwaves, Antennas & Propagation, ISSN 1751-8725, E-ISSN 1751-8733, Vol. 6, 1429-1436 p.Article in journal (Refereed) Published
This study reports on the radiofrequency (RF) performance optimisation of a novel multi-stage microelectromechanical system (MEMS) dielectric-block phase-shifter concept. The objective is to minimise the average return loss for all possible operation states of a multi-stage phase shifter, without substantially compromising the overall insertion loss or in phase-shift performance. The optimisation method presented in this study is generally applicable to any type of multi-stage RF MEMS devices that are operated in all possible state combinations of the different stages. The return loss is optimized for a seven-stage MEMS dielectric-block phase shifter by adjusting the individual distances between the phase shifter stages, for the nominal frequency of 75 GHz as well as for 500 MHz and 1 GHz bandwidth. A total of seven different designs following different optimisation approaches are investigated by simulations and measurements of fabricated devices. The best concept was found for exponentially increasing distances between the stages that takes into account the proper actuation sequence for all possible phase-shift combinations. As compared with a non-optimised device previously published by the authors, the design offering the best compromise between return loss and insertion loss, achieved by this optimisation method, results in a significant return loss improvement of 11.8 dB (simulated) and 6.98 dB (measured), whereas compromising the insertion loss by only 0.75 dB (simulated) and 0.92 dB (measured). In contrast to that all other investigated concepts, including intuitive optimisation methods such as λ/4 distances or optimisation of equidistant concepts result in a much smaller or no return-loss improvement and some even in a drastic worsening of the insertion loss.
Place, publisher, year, edition, pages
2012. Vol. 6, 1429-1436 p.
Other Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-79407DOI: 10.1049/iet-map.2012.0299ISI: 000318230200005ScopusID: 2-s2.0-84880032164OAI: oai:DiVA.org:kth-79407DiVA: diva2:495463
QC 201605042012-02-082012-02-082016-06-09Bibliographically approved