Design of a Digital Baseband Processor for UWB Transceiver on RFID Tag
2007 (English)In: 21st International Conference on Advanced Networking and Applications Workshops/Symposia, Vol 2, Proceedings, IEEE Computer Society, 2007, Vol. 2, 358-361 p.Conference paper (Refereed)
In this paper we present a novel digital baseband processor designed for UWB transceiver on RFID tag. It is a low power and low voltage (1.8V) full digital ASIC which is implemented in 0.18 mu m CMOS technology. The processor receives serial signals (consist of data and commands) from the RF Receiver, and based on received command carries out various functions such as receive data and write to the memory, compare data, send data, set/reset tag, kill tag and etc. The processor mainly consists of eight sub modules: Receive Buffer, Transmit Buffer, Random Number Generator (RNG), Slot Counter, Memory Controller, Reset Counter, Comparator, Controller.
Place, publisher, year, edition, pages
IEEE Computer Society, 2007. Vol. 2, 358-361 p.
Engineering and Technology
IdentifiersURN: urn:nbn:se:kth:diva-80363ISI: 000247030100057ScopusID: 2-s2.0-35248812563ISBN: 978-0-7695-2847-2OAI: oai:DiVA.org:kth-80363DiVA: diva2:496234
21st International Conference on Advanced Information Networking and ApplicationsWorkshops/Symposia, AINAW'07; Niagara Falls, ON; 21 May 2007 through 23 May 2007
QC 201202162012-02-092012-02-092012-02-16Bibliographically approved