Exploring ASIC Design Space at System Level with a Neural Network Estimator
1994 (English)In: Proc. of IEEE ASIC-conference, 1994, 1994Conference paper (Refereed)
Estimators are critical tools in doing architectural level exploration of the design space. We present a novel approach to estimation based on the multilayer perceptron which builds the estimation function during the learning process and thus allows to describe arbitrary complex functions. We also describe how the control data flow graph is encoded for the neural network input and we present results of the first experiments made with realistic design examples.
Place, publisher, year, edition, pages
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-89937OAI: oai:DiVA.org:kth-89937DiVA: diva2:503980
7th Annual IEEE international ASIC-conference, ASIC'94
QC 201211212012-02-172012-02-172012-11-21Bibliographically approved