Globally-Ratiochronous, Locally-Synchronous Systems
2012 (English)Doctoral thesis, monograph (Other academic)
It is well recognized in the literature that the fully-synchronous design style, once the best choice due especially to the simplicity of its design flow, is not suitable for present-days systems, which contain many more gates compared to their predecessors, and has to be superseded to meet the new needs of the industry. The alternative solution that has enjoyed more success in industry and the literature consists in breaking down a system into several fully-synchronous modules clocked with independent clocks. Such systems go under the name of Globally-non-Synchronous (GnS) and make no assumption on the phase alignment between the clocks in the individual modules. GnS design styles do not require a globally balanced clock tree and employ special synchronizers to achieve latency-insensitivity. The individual modules, whose sizes are relatively small, remain fully-synchronous, thus easy to design andmaintain.
Two main classes of GnS systems have been proposed: the GALS (for Globally-Asynchronous, Locally-Synchronous) design style allows each module to be clocked at its own independent clock frequency; the mesochronous design style constrains all modules to run at the same frequency. GALS systems support per-module Dynamic Voltage-Frequency Scaling (DVFS), but GALS interfaces are complex and introduce high performance penalties; mesochronous systems do not support per-module DVFS but support simpler and faster interfaces. It is well recognized that neither of the two design styles can fully satisfy all the contrasting needs of the electronic industry, and often hybrid solutions are deployed as a trade-off. We propose Globally-Ratiochronous, Locally-Synchronous (GRLS) systems, where GRLS is a design style intermediate between the mesochronous and the GALS design paradigms: local frequencies in a GRLS system do not need to be identical, but are required to be rationally-related (such as one being 3/4 or 2/5 of the other). The periodic properties of rationally-related systems allow the deployment of interfaces that do not use any form of handshake and, thanks to this, are much more performant than GALS interfaces; on the other hand, GRLS supports quantized per-module DVFS.
In this work we deploy and analyse all the components of the GRLS design style: the frequency regulation system, the voltage regulation system, and the GRLS latency-insensitive interfaces. We perform a theoretical analysis of DVFS efficiency in different GRLS systems, and then study a GRLS NoC-based platform. We also develop a complete GRLS power management system for a GRLS Network-on-Chip (NoC)-based platform. Experimental results show that GRLS performances are close to those of mesochronous systems and GRLS flexibility is close to that of GALS systems, which results in high figures of merit for GRLS systems. As an example, the GRLS NoC-based platform we study in this work has at least ≈ 21% lower latency-power product compared to alternative mesochronous-GALS hybrid platforms, and respectively ≈ 32% and ≈ 48% better latency-power product compared to mesochronous and GALS platforms.
Place, publisher, year, edition, pages
Stockholm: KTH Royal Institute of Technology, 2012. , xviii, 180 p.
Trita-ICT-ECS AVH, ISSN 1653-6363 ; 12:01
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-90765ISBN: 978-91-7501-258-2OAI: oai:DiVA.org:kth-90765DiVA: diva2:506477
2012-03-16, Sal / Hall D, KTH-Forum, Isafjordsgatan 39, Kista, 13:00 (English)
Yakovlev, Alexandre, Professor
Hemani, Ahmed, Professor
QC 201202292012-02-292012-02-282012-02-29Bibliographically approved