Power-efficient deterministic and adaptive routing in torus networks-on-chip
2012 (English)In: Microprocessors and microsystems, ISSN 0141-9331, E-ISSN 1872-9436, Vol. 36, no 7, 571-585 p.Article in journal (Refereed) Published
Modern SoC architectures use NoCs for high-speed inter-IP communication. For NoC architectures, high-performance efficient routing algorithms with low power consumption are essential for real-time applications. NoCs with mesh and torus interconnection topologies are now popular due to their simple structures. A torus NoC is very similar to the mesh NoC, but has rather smaller diameter. For a routing algorithm to be deadlock-free in a torus, at least two virtual channels per physical channel must be used to avoid cyclic channel dependencies due to the warp-around links; however, in a mesh network deadlock freedom can be insured using only one virtual channel. The employed number of virtual channels is important since it has a direct effect on the power consumption of NoCs. In this paper, we propose a novel systematic approach for designing deadlock-free routing algorithms for torus NoCs. Using this method a new deterministic routing algorithm (called TRANC) is proposed that uses only one virtual channel per physical channel in torus NoCs. We also propose an algorithmic mapping that enables extracting TRANC-based routing algorithms from existing routing algorithms, which can be both deterministic and adaptive. The simulation results show power consumption and performance improvements when using the proposed algorithms.
Place, publisher, year, edition, pages
Elsevier, 2012. Vol. 36, no 7, 571-585 p.
Adaptive, Deadlock, Deterministic, Mesh, NoC, Performance evaluation, Power consumption, Routing, SoC, Torus, VHDL, Virtual channel
IdentifiersURN: urn:nbn:se:kth:diva-90828DOI: 10.1016/j.micpro.2011.05.009ISI: 000309441900005ScopusID: 2-s2.0-84865838319OAI: oai:DiVA.org:kth-90828DiVA: diva2:506765
QC 201210172012-02-292012-02-292013-12-05Bibliographically approved