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Issues in High Performance Computer Network
KTH, School of Computer Science and Communication (CSC), Centres, Centre for High Performance Computing, PDC. (Parallelldatorcentrum)
1994 (English)In: IEEE Technical Comittee on Computer Archutecture Newsletter, 14-19 p.Article in journal (Refereed) Published
Abstract [en]

And the memory modules are at opposite sides of the network, or the "switch". The network bandwidth is sufficient to suport the full bandwidth of the memory system. In Massively Parallel Processors, MPPs, the processors are typically associated with one or a few memory modules in order to reduce the demands on the network when locality of reference can be exploited. The network can only support a fraction of the memory bandwidth. This difference has important consequences both for data allocation and routing. Keeping network construction costs relatively low, dictates that networks be constructed out of parts that can be fabricated by replication processes with low unit cost, and that the same parts can be used for systems of different sizes to allow for the amortization of fixed costs over large numbers of parts. Multistage networks, such as butterfly networks, \Omega\Gammaks, works, and fat--tree networks, as well as two-- and three--dimensional meshes can all be built out of massproduce.

Place, publisher, year, edition, pages
1994. 14-19 p.
National Category
Computer and Information Science
Identifiers
URN: urn:nbn:se:kth:diva-90987OAI: oai:DiVA.org:kth-90987DiVA: diva2:507638
Note
NR 20140805Available from: 2012-03-05 Created: 2012-03-05Bibliographically approved

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