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Silicide as diffusion source for dopant segregation in 70-nm MOSFETs with PtSi Schottky-barrier source/drain on ultrathin-body SOI
KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
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2008 (English)In: ULIS 2008: PROCEEDINGS OF THE 9TH INTERNATIONAL CONFERENCE ON ULTIMATE INTEGRATION ON SILICON / [ed] Esseni, D; Palestri, P; Selmi, L, NEW YORK: IEEE , 2008, 23-26 p.Conference paper, Published paper (Refereed)
Abstract [en]

In this paper, dopant segregation (DS) method is adopted to enhance device performance of PtSi-based Schottky-barrier source/drain MOSFETs (SB-MOSFETs) fabricated on ultrathin silicon-on-insulator. The DS formation is realized by means of Silicide As Diffusion Source. Without DS treatment, the devices are typically p-type, but with a rather large electron branch at positive gate bias. Dopant segregation with As is found to turn the devices to well-performing n-MOSFETs, and DS with B to greatly enhance the hole conduction in the p-MOSFETs. A large threshold voltage (V-t) shift is however observed in the p-MOSFET due to B lateral spread caused during the drive-in process for the DS formation. By reducing the drive-in temperature, this problem is partially addressed with a smaller V-t shift and a much better control of short channel effect.

Place, publisher, year, edition, pages
NEW YORK: IEEE , 2008. 23-26 p.
Keyword [en]
Schottky-barrier MOSFET, dopant segregation, threshold voltage, SADS
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-92176ISI: 000256023400006Scopus ID: 2-s2.0-49049085517OAI: oai:DiVA.org:kth-92176DiVA: diva2:512571
Conference
9th International Conference on Ultimate Integration on Silicon. Univ Udine, Udine, ITALY. MAR 13-14, 2008
Note

QC 20120328

Available from: 2012-03-28 Created: 2012-03-28 Last updated: 2016-12-19Bibliographically approved

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