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Role of Si implantation in control of underlap length in Schottky-barrier source/drain MOSFETs on ultrathin body SOI
KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
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2008 (English)In: ULIS 2008: PROCEEDINGS OF THE 9TH INTERNATIONAL CONFERENCE ON ULTIMATE INTEGRATION ON SILICON / [ed] Esseni, D; Palestri, P; Selmi, L, NEW YORK: IEEE , 2008, 175-178 p.Conference paper, Published paper (Refereed)
Abstract [en]

This works demonstrates a novel approach using Si implantation prior to Pt deposition and PtSi formation to control the underlap length between the PtSi source/drain regions to the gate in Schottky-Barrier (SB-) MOSFETs. Dopant segregation at the PtSi/Si interface is used to enhance device performance. With the I-on/I-off current ratio as an indicator, optimized Si implant doses are found for both n- and p-channel SB-MOSFETs. Through an effective barrier width, the underlap length has direct implication on the leakage current.

Place, publisher, year, edition, pages
NEW YORK: IEEE , 2008. 175-178 p.
Keyword [en]
Si implantation, underlap length, PtSi, Schottky barrier-MOSFET, dopant segregation
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-92175DOI: 10.1109/ULIS.2008.4527167ISI: 000256023400040Scopus ID: 2-s2.0-49049112693OAI: oai:DiVA.org:kth-92175DiVA: diva2:512618
Conference
9th International Conference on Ultimate Integration on Silicon. Univ Udine, Udine, ITALY. MAR 13-14, 2008
Note

QC 20120328

Available from: 2012-03-28 Created: 2012-03-28 Last updated: 2016-12-19Bibliographically approved

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Hellström, Per Erik

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CiteExportLink to record
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Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
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  • de-DE
  • en-GB
  • en-US
  • fi-FI
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  • nn-NB
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  • Other locale
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Output format
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  • asciidoc
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