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Optimizing Dynamic Post-Correction of AD Converters
KTH, Superseded Departments, Signals, Sensors and Systems.
KTH, Superseded Departments, Signals, Sensors and Systems.ORCID iD: 0000-0002-7926-5081
KTH, Superseded Departments, Signals, Sensors and Systems.ORCID iD: 0000-0002-2718-0262
2003 (English)In: Proceedings IEEE Instrumentation And Measurement Technology Conference, IEEE , 2003, 1206-1211 p.Conference paper, Published paper (Refereed)
Abstract [en]

Dynamic digital post-correction of AD converters is considered. A generalized dynamic correction method is proposed and a framework for analyzing the related bit allocation problem is derived. Finally, this framework is employed in an optimization problem. The solution to the problem indicates which ADC output bits to use in order to maximize the SINAD in a post-correction system with a constraint on memory size. The proposed methods are accompanied by exemplary results obtained using experimental ADC data.

Place, publisher, year, edition, pages
IEEE , 2003. 1206-1211 p.
Keyword [en]
Analog-digital conversion, Linearity, Memory management, Multidimensional systems, Optimization methods, Quantization, Sensor systems, Signal analysis, Table lookup, Timing jitter
National Category
Signal Processing
Identifiers
URN: urn:nbn:se:kth:diva-96559DOI: 10.1109/IMTC.2003.1207944OAI: oai:DiVA.org:kth-96559DiVA: diva2:531274
Conference
IEEE Instrumentation And Measurement Technology Conference 2003
Note
NR 20140805Available from: 2012-06-06 Created: 2012-06-06 Last updated: 2012-06-06Bibliographically approved

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Skoglund, MikaelHändel, Peter

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