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KTH, School of Information and Communication Technology (ICT).
2012 (English)Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
Abstract [en]

This thesis suggests an improved parameter database implementation for one of Ericsson products. The parameter database is used during the initialization of the system as well as during the later operation.

The database size is constantly growing because the parameter database is intended to be used with different hardware configurations. When a new technology platform is released, multiple revisions with additional features and functionalities are later created, resulting in introduction of new parameters or changes to their values. Ericsson provides support for old and new products.

The entire parameter database is currently stored in DRAM memory as a hash map. Therefore an optimal parameter database implementation should have low memory footprint. The search speed and initialization speed for the target system are also important to allow high system availability and low downtime, since a reboot is a common fix for many problems. As many optimizations have to consider memory size – speed tradeoff, it has been decided to give preference to reducing memory footprint.

This research seeks to:

  • Analyze data-structures suitable for parameter database implementation (Hash map, Sparsehash, Judy hash, Binary search tree, Treap, Skip List, AssocVector presorted using std::map, Burst trie).
  • Propose the best data-structure in terms of used memory area and speed.
  • If possible, further optimize it for database size in memory and access speed.
  • Create a prototype implementation.
  • Test the performance of the new implementation.

The results indicate that a more compact database implementation can be achieved using alternative data structures such as Presorted AssocVector an Sparsehash, however some search speed and build speed is lost when using these data structures instead of the original Gnu Hash Map implementation.

Place, publisher, year, edition, pages
2012. , 51 p.
Trita-ICT-EX, 2012:166
National Category
Engineering and Technology
URN: urn:nbn:se:kth:diva-100332OAI: diva2:543210
Educational program
Master of Science - System-on-Chip Design
Available from: 2012-08-07 Created: 2012-08-07 Last updated: 2012-08-07Bibliographically approved

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