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Effect of the Surface Morphology of Seed and Mask Layers on InP Grown on Si by Epitaxial Lateral Overgrowth
KTH, School of Information and Communication Technology (ICT), Material Physics, Semiconductor Materials, HMA.
KTH, School of Information and Communication Technology (ICT), Material Physics, Semiconductor Materials, HMA.
KTH, School of Information and Communication Technology (ICT), Material Physics, Semiconductor Materials, HMA.
KTH, School of Information and Communication Technology (ICT), Material Physics, Semiconductor Materials, HMA.
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2012 (English)In: Journal of Electronic Materials, ISSN 0361-5235, E-ISSN 1543-186X, Vol. 41, no 9, 2345-2349 p.Article in journal (Refereed) Published
Abstract [en]

Heteroepitaxy of InP on Si by epitaxial lateral overgrowth (ELOG) using a thin seed layer of InP as starting material is investigated, with special attention given to the effect of the surface morphology of the seed and the mask layers on the quality of the ELOG layers. Chemical mechanical polishing (CMP) has been used to improve the morphological and optical quality of InP grown by hydride vapor-phase epitaxy (HVPE) using ELOG. Two approaches have been investigated: polishing the InP seed layer on Si before depositing the SiO2 mask and polishing the SiO2 mask after its deposition on the unprocessed seed layer. For polishing the InP (seed)/Si, a two-step process with an aluminum oxide- and sodium hypochlorite-containing slurry as well as a slurry based on sodium hypochlorite mixed with citric acid was used. For SiO2 mask polishing, a slurry with colloidal silica as an abrasive was employed. In both cases, the SiO2 mask was patterned with double line openings and ELOG carried out in an HVPE reactor. Morphology and crystal quality of the resulting ELOG layers were studied with atomic force microscopy (AFM) and room-temperature panchromatic cathodoluminescence (PC-CL) in situ in a scanning electron microscope (SEM), respectively. The results show that, whereas both polishing approaches result in an ELOG InP layer with good morphology, its surface roughness is lower when the InP (seed)/Si is subjected to CMP prior to deposition of the SiO2 mask, than when only the SiO2 mask is polished. This approach also leads to a decrease in the number of defects generated during coalescence of the ELOG layers.

Place, publisher, year, edition, pages
2012. Vol. 41, no 9, 2345-2349 p.
Keyword [en]
Heteroepitaxy, InP, hydride vapor-phase epitaxy (HVPE), epitaxial lateral overgrowth (ELOG), chemical mechanical polishing (CMP), morphology, dislocations
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-102905DOI: 10.1007/s11664-012-2164-9ISI: 000307289400008Scopus ID: 2-s2.0-84865210241OAI: oai:DiVA.org:kth-102905DiVA: diva2:557715
Funder
Swedish Research Council, VR 621-2007-4661Vinnova, 2009-00548
Note

QC 20120928

Available from: 2012-09-28 Created: 2012-09-28 Last updated: 2017-12-07Bibliographically approved
In thesis
1. High-quality InP on Si and concepts for monolithic photonic integration
Open this publication in new window or tab >>High-quality InP on Si and concepts for monolithic photonic integration
2013 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

As the age of Moore’s law is drawing to a close, continuing increase in computing performance is becoming increasingly hard‐earned, while demand for bandwidth is insatiable. One way of dealing with this challenge is the integration of active photonic material with Si, allowing high‐speed optical inter‐ and intra‐chip connects on one hand, and the economies of scale of the CMOS industry in optical communications on the other. One of the most essential active photonic materials is InP, stemming from its capability in combination with its related materials to produce lasers, emitting at wavelengths of 1300 and 1550 nm, the two most important wavelengths in data‐ and telecom.

However, integrating InP with Si remains a challenging subject. Defects arise due to differences in lattice constants, differences in thermal expansion coefficients, polarity and island‐like growth behavior. Approaches to counter these problems include epitaxial lateral overgrowth (ELOG), which involves growing InP laterally from openings in a mask deposited on a defective InP/Si substrate. This approach solves some of these problems by filtering out the previously mentioned defects. However, filtering may not be complete and the ELOG and mask themselves may introduce new sources for formation of defects such as dislocations and stacking faults.

In this work, the various kinds of defects present in InP ELOG layers grown by hydride vapor phase epitaxy on Si, and the reason for their presence, as well as strategies for counteracting them, are investigated. The findings reveal that whereas dislocations appear in coalesced ELOG layers both on InP and InP/Si, albeit to varying extents, uncoalesced ELOG layers on both substrate types are completely free of threading dislocations. Thus, coalescence is a critical aspect in the formation of dislocations. It is shown that a rough surface of the InP/Si substrate is detrimental to defect‐free coalescence. Chemical‐mechanical polishing of this surface improves the coalescence in subsequent ELOG leading to fewer defects.

Furthermore, ELOG on InP substrate is consistently free of stacking faults. This is not the case for ELOG on InP/Si, where stacking faults are to some extent propagating from the defective substrate, and are possibly also forming during ELOG. A model describing the conditions for their propagation is devised; it shows that under certain conditions, a mask height to opening width aspect ratio of 3.9 should result in their complete blocking. As to the potential formation of new stacking faults, the formation mechanism is not entirely clear, but neither coalescence nor random deposition errors on low energy facets are the main reasons for their formation. It is hypothesized that the stacking faults can be removed by thermal annealing of the seed and ELOG layers.

Furthermore, concepts for integrating an active photonic device with passive Si components are elucidated by combining Si/SiO2 waveguides used as the mask in ELOG and multi‐quantum well (MQW) lasers grown on ELOG InP. Such a device is found to have favorable thermal dissipation, which is an added advantage in an integrated photonic CMOS device.

Place, publisher, year, edition, pages
Stockholm: KTH Royal Institute of Technology, 2013. 85 p.
Series
Trita-ICT/MAP AVH, ISSN 1653-7610 ; 2013:05
National Category
Nano Technology
Identifiers
urn:nbn:se:kth:diva-127837 (URN)
Public defence
2013-09-27, Sal/Hall E, Forum, KTH-ITC, Isafjordsgatan 39, Kista, 10:00 (English)
Opponent
Supervisors
Note

QC 20130909

Available from: 2013-09-09 Created: 2013-09-09 Last updated: 2013-09-09Bibliographically approved

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Lourdudoss, Sebastian

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