Classification of Massively Parallel Computer Architectures
2012 (English)In: Proceedings of the 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2012, IEEE , 2012, 344-351 p.Conference paper (Refereed)
Faced with slowing performance and energy benefits of technology scaling, VLSI/Computer architectures have turned from parallel to massively parallel machines for personal and embedded applications in the form of multi and many core architectures. Additionally, in the pursuit of finding the sweet spot between engineering and computational efficiency, massively parallel Coarse Grain Reconfigurable Architectures(CRGAs) have been researched. While these articles have been surveyed, they have not been rigorously classified to enable objective differentiation and comparison for performance, area and flexibility. In this paper, we extend the well known Skillicorn taxonomy to create new classes, present a scoring system to rate these classes on flexibility, and present equations for early estimation of area and configuration overheads. Furthermore, we use this extended classification scheme to classify and compare 25 different massively parallel architectures that covers most of the reported CGRAs and other well known multi and many core architectures.
Place, publisher, year, edition, pages
IEEE , 2012. 344-351 p.
, IEEE International Symposium on Parallel and Distributed Processing Workshops and PhD Forum-IPDPSW, ISSN 2164-7062
CGRAs, Coarse Grain Reconfigurable Architectures, Dynamically Reprogrammable Resource Arrays
Computer and Information Science
IdentifiersURN: urn:nbn:se:kth:diva-105619DOI: 10.1109/IPDPSW.2012.42ISI: 000309409400039ScopusID: 2-s2.0-84867414479ISBN: 978-0-7695-4676-6OAI: oai:DiVA.org:kth-105619DiVA: diva2:571540
2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2012; Shanghai; 21 May 2012 through 25 May 2012
QC 201211232012-11-232012-11-232012-11-23Bibliographically approved