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Heterogeneous 3D integration of 17 mu m pitch Si/SiGe quantum well bolometer arrays for infrared imaging systems
KTH, School of Electrical Engineering (EES), Micro and Nanosystems.ORCID iD: 0000-0002-9820-8728
KTH, School of Electrical Engineering (EES), Micro and Nanosystems.ORCID iD: 0000-0003-3452-6361
KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
Acreo AB.
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2013 (English)In: Journal of Micromechanics and Microengineering, ISSN 0960-1317, E-ISSN 1361-6439, Vol. 23, no 4, 045017- p.Article in journal (Refereed) Published
Abstract [en]

This paper reports on the realization of 17 mu m x 17 mu m pitch bolometer arrays for uncooled infrared imagers. Microbolometer arrays have been available in primarily defense applications since the mid-1980s and are typically based on deposited thin films on top of CMOS wafers that are surface-machined into sensor pixels. This paper instead focuses on the heterogeneous integration of monocrystalline Si/SiGe quantum-well-based thermistor material in a CMOS-compliant process using adhesive wafer bonding. The high-quality monocrystalline thermistor material opens up for potentially lower noise compared to commercially available uncooled microbolometer arrays together with a competitive temperature coefficient of resistance (TCR). Characterized bolometers had a TCR of -2.9% K-1 in vacuum, measured thermal conductances around 5 x 10(-8) WK-1 and thermal time constants between 4.9 and 8.5 ms, depending on the design. Complications in the fabrication of stress-free bolometer legs and low-noise contacts are discussed and analyzed.

Place, publisher, year, edition, pages
2013. Vol. 23, no 4, 045017- p.
National Category
Engineering and Technology
Identifiers
URN: urn:nbn:se:kth:diva-106201DOI: 10.1088/0960-1317/23/4/045017ISI: 000316299900018Scopus ID: 2-s2.0-84878081474OAI: oai:DiVA.org:kth-106201DiVA: diva2:572967
Note

QC 20130422. Updated from submitted to published.

Available from: 2012-11-29 Created: 2012-11-29 Last updated: 2017-12-07Bibliographically approved
In thesis
1. Integration and Fabrication Techniques for 3D Micro- and Nanodevices
Open this publication in new window or tab >>Integration and Fabrication Techniques for 3D Micro- and Nanodevices
2012 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

The development of micro and nano-electromechanical systems (MEMS and NEMS) with entirely new or improved functionalities is typically based on novel or improved designs, materials and fabrication methods. However, today’s micro- and nano-fabrication is restrained by manufacturing paradigms that have been established by the integrated circuit (IC) industry over the past few decades. The exclusive use of IC manufacturing technologies leads to limited material choices, limited design flexibility and consequently to sub-optimal MEMS and NEMS devices. The work presented in this thesis breaks new ground with a multitude of novel approaches for the integration of non-standard materials that enable the fabrication of 3D micro and nanoelectromechanical systems. The objective of this thesis is to highlight methods that make use of non-standard materials with superior characteristics or methods that use standard materials and fabrication techniques in a novel context. The overall goal is to propose suitable and cost-efficient fabrication and integration methods, which can easily be made available to the industry.

The first part of the thesis deals with the integration of bulk wire materials. A novel approach for the integration of at least partly ferromagnetic bulk wire materials has been implemented for the fabrication of high aspect ratio through silicon vias. Standard wire bonding technology, a very mature back-end technology, has been adapted for yet another through silicon via fabrication method and applications including liquid and vacuum packaging as well as microactuators based on shape memory alloy wires. As this thesis reveals, wire bonding, as a versatile and highly efficient technology, can be utilized for applications far beyond traditional interconnections in electronics packaging.

The second part presents two approaches for the 3D heterogeneous integration based on layer transfer. Highly efficient monocrystalline silicon/ germanium is integrated on wafer-level for the fabrication of uncooled thermal image sensors and monolayer-graphene is integrated on chip-level for the use in diaphragm-based pressure sensors.

The last part introduces a novel additive fabrication method for layer-bylayer printing of 3D silicon micro- and nano-structures. This method combines existing technologies, including focused ion beam implantation and chemical vapor deposition of silicon, in order to establish a high-resolution fabrication process that is related to popular 3D printing techniques.

Place, publisher, year, edition, pages
Stockholm: KTH Royal Institute of Technology, 2012. xv, 91 p.
Series
TRITA-EE, ISSN 1653-5146 ; 2013:001
Keyword
Microelectromechanical systems, MEMS, Nanoelectromechanical systems, NEMS, silicon, wafer-level, chip-level, through silicon via, TSV, packaging, 3D packaging, vacuum packaging, liquid encapsulation, integration, heterogeneous integration, wafer bonding, microactuators, shape memory alloy, SMA, wire bonding, magnetic assembly, self-assembly, 3D, 3D printing, focused ion beam, FIB
National Category
Engineering and Technology
Identifiers
urn:nbn:se:kth:diva-107125 (URN)978-91-7501-583-5 (ISBN)
Public defence
2013-01-18, F3, Lindstedtsvägen 26, KTH, Stockholm, 10:00 (English)
Opponent
Supervisors
Note

QC 20121207

Available from: 2012-12-07 Created: 2012-12-06 Last updated: 2016-08-11Bibliographically approved
2. Heterogeneous material integration for MEMS
Open this publication in new window or tab >>Heterogeneous material integration for MEMS
2013 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

This thesis describes heterogeneous integration methods for the fabrication of microelectromechanical systems (MEMS). Most MEMS devices reuse the fabrication techniques that are found in the microelectronics integrated circuit industry. This limits the selection of materials and processes that are feasible for the realization of MEMS devices. Heterogeneous integration methods, on the other hand, consist of the separate pre-fabrication of sub-components followed by an assembly step. The pre-fabrication of subcomponents opens up for a wider selection of fabrication technologies and thus potentially better performing and more optimized devices. The first part of the thesis is focused upon an adhesive wafer-level layer transfer method to fabricate resistive microbolometer-based long-wavelength infrared focal plane arrays. This is realized by a CMOS-compatible transfer of monocrystalline silicon with epitaxially grown silicon-germanium quantum wells. Heterogeneous transfer methods are also used for the realization of filtering devices, integration of distributed small dies onto larger wafer formats and to fabricate a graphene-based pressure sensor. The filtering devices consist of very fragile nano-porous membranes that with the presented dry adhesive methods can be transferred without clogging or breaking. Pick-and-place methods for the massive transfer of small dies between different wafer formats are limited by time and die size-considerations. Our presented solution solves these problems by expanding a die array on a flexible tape, followed by adhesive wafer bonding to a target wafer. Furthermore, a gauge pressure sensor is realized by transferring a graphene monolayer grown on a copper foil to a micromachined target wafer with a silicon oxide interface layer. This device is used to extract the gauge factor of graphene. Adhesive bonding is an enabling technology for the presented heterogeneous integration techniques. A blister test method together with an experimental setup to characterize the bond energies between adhesives and bonded substrates is also presented.

Place, publisher, year, edition, pages
Stockholm: KTH Royal Institute of Technology, 2013. xii, 87 p.
Series
Trita-EE, ISSN 1653-5146 ; 2013:039
National Category
Engineering and Technology
Identifiers
urn:nbn:se:kth:diva-129185 (URN)
Public defence
2013-10-25, Kollegiesalen, Brinellvägen 8, KTH, Stockholm, 10:00 (English)
Opponent
Supervisors
Note

QC 20131003

Available from: 2013-10-03 Created: 2013-09-22 Last updated: 2013-10-04Bibliographically approved

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Forsberg, FredrikFischer, Andreas C.Stemme, GöranNiklaus, Frank

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