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An adaptive cache coherence protocol optimized for migratory sharing
Lund university.
Lund university.ORCID iD: 0000-0002-9637-2065
1993 (English)Conference paper (Refereed)
Abstract [en]

Parallel programs that use critical sections and are executed on a shared-memory multiprocessor with a write-invalidate protocol result in invalidation actions that could be eliminated. For this type of sharing, called migratory sharing, each processor typically causes a cache miss followed by an invalidation request which could be merged with the preceding cache-miss request. The authors propose an adaptive protocol that invokes this optimization dynamically for migratory blocks. For other blocks, the protocol works as an ordinary write-invalidate protocol. They show that the protocol is a simple extension to a write-invalidate protocol. Based on a program-driven simulation model of an architecture similar to the Stanford DASH, and a set of four benchmarks, they evaluate the potential performance improvements of the protocol. They find that it effectively eliminates most single invalidations which improves the performance by reducing the shared access penalty and the network traffic.

Place, publisher, year, edition, pages
1993. 109-18 p.
National Category
Computer Systems
URN: urn:nbn:se:kth:diva-109700OAI: diva2:584868
Proceedings of the International Symposium on Computer Architecture (ISCA’93)
NR 20140805Available from: 2013-01-09 Created: 2013-01-08 Last updated: 2013-01-09Bibliographically approved

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Brorsson, Mats
Computer Systems

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