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Towards a Formal Software Synthesis Methodology for Embedded Multiprocessor Systems
KTH, School of Information and Communication Technology (ICT), Electronic Systems.ORCID iD: 0000-0003-4859-3100
KTH, School of Information and Communication Technology (ICT), Electronic Systems.ORCID iD: 0000-0002-2171-1528
2011 (English)In: Proceedings of First International Software Technology Exchange Workshop 2011, 2011Conference paper, Published paper (Refereed)
Abstract [en]

This paper addresses the increasing complexity of software design for multiprocessor embedded systems by proposing a designmethodology that combines a formal foundation based on the theory of models of computation (MoCs) and the industrial systemdesign language SystemC. The ForSyDe methodology provides thedesigner with SystemC class libraries that lead to executable system models, from which abstract analyzable models can be extracted. Using these abstract models, the design exploration andsynthesis process can make use of existing MoC theory by for instance incorporating efficient scheduling and buffer optimizationtechniques. The choice of SystemC as modeling language allowsfor an efficient implementation, since system model functions canbe directly compiled to target processors.

Place, publisher, year, edition, pages
2011.
National Category
Embedded Systems
Identifiers
URN: urn:nbn:se:kth:diva-111434OAI: oai:DiVA.org:kth-111434DiVA: diva2:586262
Conference
First International Software Technology Exchange Workshop 2011
Note

QC 20130527

Available from: 2013-01-11 Created: 2013-01-11 Last updated: 2013-05-27Bibliographically approved

Open Access in DiVA

No full text

Other links

http://www.swedsoft.se/wp-content/uploads/2011/09/stew2011_submission_10.pdf

Authority records BETA

Sander, IngoAttarzadeh Niaki, Seyed Hosein

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