CMOS compatible ALD high-k double slot grating couplers for on-chip optical interconnects
2012 (English)In: Solid-State Device Research Conference (ESSDERC), 2012 Proceedings of the European, IEEE , 2012, 93-96 p.Conference paper (Refereed)
Silicon-on-insulator(SOI) novel on-chip grating couplers for double slot high-k waveguides are experimentally demonstrated. The devices were fabricated with standard CMOS process technology. The grating couplers were designed for the best performance at the C-band communication range. Two thin layers of aluminum oxide formed the slot region of the waveguide. The high-k layers were deposited using the atomic layer deposition (ALD) method. A reliable process was realized by etching the structures to the buried oxide. Effect of the top oxide cladding layer on the efficiency was studied. The grating couplers had a measured efficiency of 22% at 1.55μm wavelength. This efficiency is competitive to other results reported by other groups.
Place, publisher, year, edition, pages
IEEE , 2012. 93-96 p.
, European Solid-State Device Research Conference, ISSN 1930-8876
Aluminum oxides, Buried oxides, Cladding layer, CMOS Compatible, Communication range, Grating couplers, On chips, On-chip optical interconnects, Silicon-on-insulators, Standard CMOS process, Thin layers
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-111803DOI: 10.1109/ESSDERC.2012.6343341ScopusID: 2-s2.0-84870591044ISBN: 978-146731707-8OAI: oai:DiVA.org:kth-111803DiVA: diva2:587416
42nd European Solid-State Device Research Conference, ESSDERC 2012, 17 September 2012 through 21 September 2012, Bordeaux
QC 201301142013-01-142013-01-142014-11-14Bibliographically approved