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A wafer-scale, dye-based, photonic sensing system
KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
KTH, School of Electrical Engineering (EES), Micro and Nanosystems.
KTH, School of Electrical Engineering (EES), Micro and Nanosystems.ORCID iD: 0000-0002-0525-8647
KTH, School of Electrical Engineering (EES), Micro and Nanosystems.ORCID iD: 0000-0002-2650-0121
Show others and affiliations
(English)Manuscript (preprint) (Other academic)
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-126087OAI: oai:DiVA.org:kth-126087DiVA: diva2:641687
Note

QS 2013

Available from: 2013-08-19 Created: 2013-08-19 Last updated: 2013-08-19Bibliographically approved
In thesis
1. Wafer-level 3-D CMOS Integration of Very-large-scale Silicon Micromirror Arrays and Room-temperature Wafer-level Packaging
Open this publication in new window or tab >>Wafer-level 3-D CMOS Integration of Very-large-scale Silicon Micromirror Arrays and Room-temperature Wafer-level Packaging
2013 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

This thesis describes the development of wafer-level fabrication and packaging methods for micro-electromechanical (MEMS) devices, based on wafer-bonding.

The first part of the thesis is addressing the development of a wafer-level technology that allows the use of high performance materials, such as monocrystalline silicon, for MEMS devices that are closely integrated on top of sensitive integrated circuits substrates. Monocrystalline silicon has excellent mechanical properties that are hard to achieve otherwise, and therefore it fits well in devices for adaptive optics and maskwriting applications where nanometer precision deflection requirements call for mechanically stable materials. However, the temperature sensitivity of the integrated circuits prohibits the use of monocrystalline silicon with conventional deposition and surface micromachining techniques. Here, heterogeneous 3-D integration by adhesive wafer-bonding is used to fabricate three different types of spatial light modulators, based on micromirror arrays made of monocrystalline silicon; micromirror arrays with vertically moving “piston-type” mirrors and with tilting mirrors made of one functional monocrystalline silicon layer, and vertically moving hidden-hinge micromirror arrays made of two functional monocrystalline silicon layers.

The second part of the thesis addresses the need for room-temperature packaging methods that allow the packaging of liquids or in general heat sensitive devices on wafer-level. A packaging method was developed that is based on a hybrid wafer-bonding approach, combining the compression bonding of gold gaskets with adhesive bonding. The packaging method is first demonstrated for the wafer-level encapsulation of liquids in reservoirs and then applied to packaging a dye-based photonic gas sensor.

 

Place, publisher, year, edition, pages
Stockholm: KTH Royal Institute of Technology, 2013. xi, 126 p.
Series
Trita-EES, 2013:031
National Category
Engineering and Technology
Identifiers
urn:nbn:se:kth:diva-125913 (URN)978-91-7501-843-0 (ISBN)
Public defence
2013-09-06, F3, Lindstedtsvägen 26, KTH, Stockholm, 14:14 (English)
Opponent
Supervisors
Note

QC 20130816

Available from: 2013-08-16 Created: 2013-08-16 Last updated: 2013-08-19Bibliographically approved

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Niklaus, FrankSohlström, Hans

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