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Defect reduction in heteroepitaxial InP on Si by epitaxial lateral overgrowth
KTH, School of Information and Communication Technology (ICT), Materials- and Nano Physics, Semiconductor Materials, HMA.
KTH, School of Information and Communication Technology (ICT), Materials- and Nano Physics, Semiconductor Materials, HMA.
KTH, School of Information and Communication Technology (ICT), Materials- and Nano Physics, Semiconductor Materials, HMA.ORCID iD: 0000-0002-8545-6546
KTH, School of Information and Communication Technology (ICT), Materials- and Nano Physics, Semiconductor Materials, HMA.ORCID iD: 0000-0002-0977-2598
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2014 (English)In: Materials Express, ISSN 2158-5849, Vol. 4, no 1, 41-53 p.Article in journal (Refereed) Published
Abstract [en]

Epitaxial lateral overgrowth of InP has been grown by hydride vapor phase epitaxy on Si substrates with a thin seed layer of InP masked with SiO2. Openings in the form of multiple parallel lines as well as mesh patterns from which growth occurred were etched in the SiO2 mask and the effect of different growth conditions in terms of V/III ratio and growth temperature on defects such as threading dislocations and stacking faults in the grown layers was investigated. The samples were characterized by cathodoluminescence and by transmission electron microscopy. The results show that the cause for threading dislocations present in the overgrown layers is the formation of new dislocations, attributed to coalescence of merging growth fronts, possibly accompanied by the propagation of pre-existing dislocations through the mask openings. Stacking faults were also pre-existing in the seed layer and propagated to some extent, but the most important reason for stacking faults in the overgrown layers was concluded to be formation of new faults early during growth. The formation mechanism could not be unambiguously determined, but of several mechanisms considered, incorrect deposition due to distorted bonds along overgrowth island edges was found to be in best agreement with observations.

Place, publisher, year, edition, pages
2014. Vol. 4, no 1, 41-53 p.
Keyword [en]
Heteroepitaxy, InP on Si, Defect Characterization, Optical Properties, Lateral Overgrowth
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-127847DOI: 10.1166/mex.2014.1140ISI: 000329798000005Scopus ID: 2-s2.0-84892704735OAI: oai:DiVA.org:kth-127847DiVA: diva2:646479
Funder
Swedish Foundation for Strategic Research Swedish Research CouncilVinnova
Note

QC 20140212. Updated from submitted to published.

Available from: 2013-09-09 Created: 2013-09-09 Last updated: 2014-03-14Bibliographically approved
In thesis
1. High-quality InP on Si and concepts for monolithic photonic integration
Open this publication in new window or tab >>High-quality InP on Si and concepts for monolithic photonic integration
2013 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

As the age of Moore’s law is drawing to a close, continuing increase in computing performance is becoming increasingly hard‐earned, while demand for bandwidth is insatiable. One way of dealing with this challenge is the integration of active photonic material with Si, allowing high‐speed optical inter‐ and intra‐chip connects on one hand, and the economies of scale of the CMOS industry in optical communications on the other. One of the most essential active photonic materials is InP, stemming from its capability in combination with its related materials to produce lasers, emitting at wavelengths of 1300 and 1550 nm, the two most important wavelengths in data‐ and telecom.

However, integrating InP with Si remains a challenging subject. Defects arise due to differences in lattice constants, differences in thermal expansion coefficients, polarity and island‐like growth behavior. Approaches to counter these problems include epitaxial lateral overgrowth (ELOG), which involves growing InP laterally from openings in a mask deposited on a defective InP/Si substrate. This approach solves some of these problems by filtering out the previously mentioned defects. However, filtering may not be complete and the ELOG and mask themselves may introduce new sources for formation of defects such as dislocations and stacking faults.

In this work, the various kinds of defects present in InP ELOG layers grown by hydride vapor phase epitaxy on Si, and the reason for their presence, as well as strategies for counteracting them, are investigated. The findings reveal that whereas dislocations appear in coalesced ELOG layers both on InP and InP/Si, albeit to varying extents, uncoalesced ELOG layers on both substrate types are completely free of threading dislocations. Thus, coalescence is a critical aspect in the formation of dislocations. It is shown that a rough surface of the InP/Si substrate is detrimental to defect‐free coalescence. Chemical‐mechanical polishing of this surface improves the coalescence in subsequent ELOG leading to fewer defects.

Furthermore, ELOG on InP substrate is consistently free of stacking faults. This is not the case for ELOG on InP/Si, where stacking faults are to some extent propagating from the defective substrate, and are possibly also forming during ELOG. A model describing the conditions for their propagation is devised; it shows that under certain conditions, a mask height to opening width aspect ratio of 3.9 should result in their complete blocking. As to the potential formation of new stacking faults, the formation mechanism is not entirely clear, but neither coalescence nor random deposition errors on low energy facets are the main reasons for their formation. It is hypothesized that the stacking faults can be removed by thermal annealing of the seed and ELOG layers.

Furthermore, concepts for integrating an active photonic device with passive Si components are elucidated by combining Si/SiO2 waveguides used as the mask in ELOG and multi‐quantum well (MQW) lasers grown on ELOG InP. Such a device is found to have favorable thermal dissipation, which is an added advantage in an integrated photonic CMOS device.

Place, publisher, year, edition, pages
Stockholm: KTH Royal Institute of Technology, 2013. 85 p.
Series
Trita-ICT/MAP AVH, ISSN 1653-7610 ; 2013:05
National Category
Nano Technology
Identifiers
urn:nbn:se:kth:diva-127837 (URN)
Public defence
2013-09-27, Sal/Hall E, Forum, KTH-ITC, Isafjordsgatan 39, Kista, 10:00 (English)
Opponent
Supervisors
Note

QC 20130909

Available from: 2013-09-09 Created: 2013-09-09 Last updated: 2013-09-09Bibliographically approved

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Sun, YantingLourdudoss, Sebastian

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