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Very high aspect ratio through silicon vias (TSVs) using wire bonding
KTH, School of Electrical Engineering (EES), Micro and Nanosystems.ORCID iD: 0000-0002-8853-0967
KTH, School of Electrical Engineering (EES), Micro and Nanosystems.ORCID iD: 0000-0003-3452-6361
KTH, School of Electrical Engineering (EES), Micro and Nanosystems.ORCID iD: 0000-0001-9552-4234
KTH, School of Electrical Engineering (EES), Micro and Nanosystems.ORCID iD: 0000-0002-0525-8647
2013 (English)In: Transducers & Eurosensors XXVII: The 17th International Conference on Solid-State Sensors, Actuators and Microsystems (TRANSDUCERS & EUROSENSORS XXVII), 2013, IEEE conference proceedings, 2013, 167-170 p.Conference paper, Published paper (Refereed)
Abstract [en]

This paper reports a fabrication approach for very high aspect ratio through silicon vias (TSVs). The metal filling of the through via holes is implemented by adapting standard wire bonding technology. TSVs with a diameter of 30 μm and aspect ratios between 10:1 and 20:1 have been fabricated. Basic electrical characterization and optical inspection have been conducted to verify the resistance and integrity of the metal and insulator filling of the TSV.

Place, publisher, year, edition, pages
IEEE conference proceedings, 2013. 167-170 p.
Keyword [en]
Metal through silicon vias, TSVs, high aspect ratio, wire bonding
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-129737DOI: 10.1109/Transducers.2013.6626728Scopus ID: 2-s2.0-84891667875ISBN: 978-1-4673-5983-2 (print)OAI: oai:DiVA.org:kth-129737DiVA: diva2:653428
Conference
2013 17th International Conference on Solid-State Sensors, Actuators and Microsystems, TRANSDUCERS and EUROSENSORS 2013; Barcelona; Spain; 16 June 2013 through 20 June 2013
Note

QC 20131007

Available from: 2013-10-04 Created: 2013-10-04 Last updated: 2014-02-05Bibliographically approved

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T13_VHARTSVUWB(639 kB)184 downloads
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Schröder, StephanFischer, Andreas C.Stemme, GöranNiklaus, Frank

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