Change search
ReferencesLink to record
Permanent link

Direct link
Energy-aware fault-tolerant network-on-chips for addressing multiple traffic classes
KTH, School of Information and Communication Technology (ICT), Electronic Systems. University of Turku, Finland.
University of Turku, Finland. (Turku Centre for Computer Science, Finland)
KTH, School of Information and Communication Technology (ICT), Electronic Systems.ORCID iD: 0000-0003-0565-9376
Indian Institute of Technology, Delhi, India. (Department of Computer Science and engineering)
Show others and affiliations
2013 (English)In: Microprocessors and microsystems, ISSN 0141-9331, E-ISSN 1872-9436, Vol. 37, no 8, 811-822 p.Article in journal (Refereed) Published
Abstract [en]

This paper presents an energy efficient architecture to provide on-demand fault tolerance to multiple traffic classes, running simultaneously on single network on chip (NoC) platform. Today, NoCs host multiple traffic classes with potentially different reliability needs. Providing platform-wide worst-case (maximum) protection to all the classes is neither optimal nor desirable. To reduce the overheads incurred by fault tolerance, various adaptive strategies have been proposed. The proposed techniques rely on individual packet fields and operating conditions to adjust the intensity and hence the overhead of fault tolerance. Presence of multiple traffic classes undermines the effectiveness of these methods. To complement the existing adaptive strategies, we propose on-demand fault tolerance, capable of providing required reliability, while significantly reducing the energy overhead. Our solution relies on a hierarchical agent based control layer and a reconfigurable fault tolerance data path. The control layer identifies the traffic class and directs the packet to the path providing the needed reliability. Simulation results using representative applications (matrix multiplication, FFT, wavefront, and HiperLAN) showed up to 95% decrease in energy consumption compared to traditional worst case methods. Synthesis results have confirmed a negligible additional overhead, for providing on-demand protection (up to 5.3% area), compared to the overall fault tolerance circuitry.

Place, publisher, year, edition, pages
2013. Vol. 37, no 8, 811-822 p.
Keyword [en]
Adaptive network on chips, Energy aware systems, Fault tolerant network on chips, Network on chips
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
URN: urn:nbn:se:kth:diva-132354DOI: 10.1016/j.micpro.2013.04.005ISI: 000329416600006ScopusID: 2-s2.0-84888302959OAI: diva2:659500

QC 20140130

Available from: 2013-10-25 Created: 2013-10-25 Last updated: 2014-01-30Bibliographically approved

Open Access in DiVA

No full text

Other links

Publisher's full textScopus

Search in DiVA

By author/editor
Jafri, Syed Mohammad Asad HassanHemani, AhmedTenhunen, Hannu
By organisation
Electronic Systems
In the same journal
Microprocessors and microsystems
Other Electrical Engineering, Electronic Engineering, Information Engineering

Search outside of DiVA

GoogleGoogle Scholar
The number of downloads is the sum of all downloads of full texts. It may include eg previous versions that are now no longer available

Altmetric score

Total: 29 hits
ReferencesLink to record
Permanent link

Direct link