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Predictive sorting algorithm for modular multilevel converters minimizing the spread in the submodule capacitor voltages
KTH, School of Electrical Engineering (EES), Electrical Energy Conversion.
ABB Corporate Research, Västerås, Sweden .
KTH, School of Electrical Engineering (EES), Electrical Energy Conversion.ORCID iD: 0000-0002-8565-4753
KTH, School of Electrical Engineering (EES), Electrical Energy Conversion.ORCID iD: 0000-0002-1755-1365
2013 (English)In: 2013 IEEE ECCE Asia Downunder - 5th IEEE Annual International Energy Conversion Congress and Exhibition, IEEE ECCE Asia 2013, IEEE , 2013, 325-331 p.Conference paper, Published paper (Refereed)
Abstract [en]

The modular multilevel converter is a suitable topology for bidirectional ac-dc conversion in high-voltage high-power applications. By connecting submodule circuits in series, a high-voltage waveform with excellent harmonic performance can be achieved with a very high efficiency and low switching frequency. The balancing of the capacitor voltages will, however, become increasingly difficult as the switching frequency is reduced. Although the capacitor voltages can be kept balanced over time even at the fundamental switching frequency, the spread and thus also the peak variation in the capacitor voltages will typically increase at lower switching frequencies. This paper presents a capacitor voltage balancing strategy which aims to combine a low switching frequency with a low capacitor voltage ripple. This is done by a predictive algorithm that calculates the amount of charge that must be stored in the submodule capacitors during the following fundamental frequency period. The converter is then controlled in such a way that the stored charge in the submodule capacitors is evenly distributed among all the submodules when the capacitor voltages reach their maximum values. In this way, it is possible to limit the peak voltage in the capacitor at switching frequencies as low as 2-3 times the fundamental frequency. The capacitor voltage balancing strategy is first validated by simulation results at 110 Hz switching frequency. It is observeved that when the proposed method is used, the capacitor voltage ripple is 35% lower compared to the case when a conventional sorting algorithm is used. The capacitor voltage balancing strategy is also validated experimentally at 130 Hz switching frequency. The experimental results show that it is possible to combine the proposed method with previously presented circulating-current control methods.

Place, publisher, year, edition, pages
IEEE , 2013. 325-331 p.
Keyword [en]
Capacitor voltage balancing, Capacitor voltage ripple, Fundamental frequencies, Fundamental switching, High-voltage high-power, Low switching frequency, Modular multilevel converters, Predictive algorithms
National Category
Engineering and Technology
Identifiers
URN: urn:nbn:se:kth:diva-133363DOI: 10.1109/ECCE-Asia.2013.6579116ISI: 000332789100052Scopus ID: 2-s2.0-84883674510ISBN: 978-147990482-2 (print)OAI: oai:DiVA.org:kth-133363DiVA: diva2:661431
Conference
2013 IEEE ECCE Asia Downunder - 5th IEEE Annual International Energy Conversion Congress and Exhibition, IEEE ECCE Asia 2013; Melbourne, VIC; Australia; 3 June 2013 through 6 June 2013
Note

QC 20131104

Available from: 2013-11-04 Created: 2013-10-31 Last updated: 2014-04-24Bibliographically approved

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Norrga, StaffanNee, Hans-Peter

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