PERMAP: A Performance-Aware Mapping for Application-Specific SoCs
2008 (English)In: 2008 International Conference on Application-Specific Systems, Architectures and Processors, 2008, 73-78 p.Conference paper (Refereed)
Future System-on-Chip (SoC) designs will need efficient on-chip communication architectures that can provide efficient and scalable data transport among the Intellectual Properties (IPs). Designing and optimizing SoCs is an increasingly difficult task due to the size and complexity of the SoC design space, high cost of detailed simulation, and several constraints that the design must satisfy. For efficient design of SoCs, an efficient mapping of IPs onto Networks-on-Chip (NoCs) is highly desirable. Towards this end, we have presented PERMAP, a PERformance-aware MAPping algorithm which maps the IPs onto a generic NoC architecture such that the average communication delay is minimized This is accomplished by a performance analytical model which can be used for any arbitrary network topology with wormhole routing, The algorithm is used for mapping a video application onto a tile-based NoC and experimental results show that PERMAP is fast and robust.
Place, publisher, year, edition, pages
2008. 73-78 p.
, IEEE INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS, ISSN 1063-6862
IdentifiersURN: urn:nbn:se:kth:diva-136401DOI: 10.1109/ASAP.2008.4580157ISI: 000260566200013ScopusID: 2-s2.0-51649113422ISBN: 978-1-4244-1897-8OAI: oai:DiVA.org:kth-136401DiVA: diva2:675969
19th IEEE International Conference on Application-Specific Systems, Architectures and Processors, JUL 02-04, 2008, Leuven, BELGIUM
QC 201312052013-12-052013-12-052013-12-05Bibliographically approved