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A BDD-Based Method for LFSR Parallelization with Application to Fast CRC Encoding
KTH, School of Information and Communication Technology (ICT), Electronic Systems.ORCID iD: 0000-0001-7382-9408
KTH, School of Information and Communication Technology (ICT), Electronic Systems.
2013 (English)In: Journal of Multiple-Valued Logic and Soft Computing, ISSN 1542-3980, E-ISSN 1542-3999, Vol. 21, no 5-6, 561-574 p.Article in journal (Refereed) Published
Abstract [en]

Galois Fields of order 2(k), GF(2(k)), provide a unified theoretical framework for constructing parallel devices generating k output bits per clock cycle. In this paper, we use GF(2(k)) for constructing Linear Feedback Shift Registers (LFSRs) for the parallel encoding of Cyclic Redundancy Check (CRC) codes. CRC codes are widely used in data communication and storage for detecting burst errors. Traditional methods for the parallel encoding of CRC are based on computing the kth power of the connection matrix of the LFSR. We propose an alternative method based on computing the kth power of the transition relation of the LFSR. We use Binary Decision Diagrams (BDDs) for representing the transition relation in a partitioned form. This allows us to bound the size of BDDs by O(n(2)), where it is the size of the LFSR. The presented algorithm is asymptotically faster than previous algorithms for LFSR parallelization.

Place, publisher, year, edition, pages
2013. Vol. 21, no 5-6, 561-574 p.
Keyword [en]
CRC, LFSR, BDD, transition relation
National Category
Computer Science Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-136535ISI: 000326481400008Scopus ID: 2-s2.0-84889062205OAI: oai:DiVA.org:kth-136535DiVA: diva2:677038
Funder
Swedish Research Council, 621-2010-4388
Note

QC 20131209

Available from: 2013-12-09 Created: 2013-12-05 Last updated: 2017-12-06Bibliographically approved

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Dubrova, Elena

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CiteExportLink to record
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  • apa
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  • vancouver
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  • de-DE
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