Change search
ReferencesLink to record
Permanent link

Direct link
Implementation of 64-point FFTs as a building block for OFDM-based standards with respect to different criteria
KTH, School of Information and Communication Technology (ICT).
2013 (English)Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesis
Abstract [en]


This master thesis implements a critical block: Fast Fourier Transform

(FFT)/Inverse Fast Fourier Transform (IFFT) for standards using Orthogonal

Frequency Division Multiplexing (OFDM). They are used in OFDM systems

for modulating / demodulating subcarriers.

The main goal of this thesis is to implement these blocks in a Field Programmable

Gate Array (FPGA) using Very High Speed Integrated Circuit

Hardware Description Language (VHDL). OFDM technology is used in multiple

wireless communication standards including WLAN IEEE 802.11(a/g/n),

WiMAX, LTE and DVB. 64-point FFT/IFFT blocks determines the complexity

of an IEEE 802.11 OFDM transceiver.

In this thesis project, a serial to parallel (S2P) converter, six FFT/IFFT

architectures and parallel to serial (P2S) converter modules using fixed-point

two's complement number system were implemented. The FFT uses an 18 bit

fixed point representation for input/output data and memory coefficients. It

is designed using radix-2 Decimation-In-Time (DIT) architecture. The implemented

FFT architectures are differing with respect to RAM memory access,

way of processing of the input samples, number of computational elements (butterflies)

and memory storage requirements. The three realized implementation

categories are: in-place computation, direct FFT computation and pipelined

FFT computation. This report explains FFT architectures and methodologies

to design, simulate and implement them on an FPGA device. This thesis report

also presents area results in terms of FPGA resources and throughput results

in terms of number of clock cycles for all the FFT architectures.

Place, publisher, year, edition, pages
2013. , 43 p.
TRITA-ICT-EX, 2013:274
National Category
Computer and Information Science
URN: urn:nbn:se:kth:diva-140885OAI: diva2:693424
Educational program
Master of Science - System-on-Chip Design
Available from: 2014-02-04 Created: 2014-02-04 Last updated: 2014-02-04

Open Access in DiVA

fulltext(964 kB)700 downloads
File information
File name FULLTEXT01.pdfFile size 964 kBChecksum SHA-512
Type fulltextMimetype application/pdf

By organisation
School of Information and Communication Technology (ICT)
Computer and Information Science

Search outside of DiVA

GoogleGoogle Scholar
Total: 713 downloads
The number of downloads is the sum of all downloads of full texts. It may include eg previous versions that are now no longer available

Total: 168 hits
ReferencesLink to record
Permanent link

Direct link