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System level synthesis of hardware for DSP applications using pre-characterized function implementations
KTH, School of Information and Communication Technology (ICT), Electronic Systems.ORCID iD: 0000-0002-4157-4487
KTH, School of Information and Communication Technology (ICT), Electronic Systems.
KTH, School of Information and Communication Technology (ICT), Electronic Systems.ORCID iD: 0000-0003-0565-9376
KTH, School of Information and Communication Technology (ICT), Electronic Systems.ORCID iD: 0000-0001-9350-7772
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2013 (English)In: 2013 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), IEEE , 2013Conference paper, Published paper (Refereed)
Abstract [en]

SYLVA is a system level synthesis framework that transforms DSP sub-systems modeled as synchronous data flow into hardware implementations in ASIC, FPGAs or CGRAs. SYLVA synthesizes in terms of pre-characterized function implementations (FTMPs). It explores the design space in three dimensions, number of FTMPs, type of FTMPs and pipeline parallelism between the producing and consuming FTMPs. We introduce timing and interface model of FTMPs to enable reuse and automatic generation of Global Interconnect and Control (GLIC) to glue the FTMPs together into a working system. SYLVA has been evaluated by applying it to five realistic DSP applications and results analyzed for design space exploration, efficacy in generating GLIC by comparing to manually generated GLIC and accuracy of design space exploration by comparing the area and energy costs considered during the design space exploration based on pre-characterized FIMPs and the final results.

Place, publisher, year, edition, pages
IEEE , 2013.
Keyword [en]
Design space exploration, Electronic system level synthesis, Reuse, Synchronous data flow, System level synthesis
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-143296DOI: 10.1109/CODES-ISSS.2013.6659003Scopus ID: 2-s2.0-84892642437ISBN: 978-147991417-3 (print)OAI: oai:DiVA.org:kth-143296DiVA: diva2:706277
Conference
11th ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2013; Montreal, QC; Canada; 29 September 2013 through 4 October 2013
Note

QC 20140319

Available from: 2014-03-19 Created: 2014-03-19 Last updated: 2014-03-19Bibliographically approved

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Li, ShuoHemani, AhmedRosvall, KathrinSander, Ingo

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