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Lateral p-n-p Transistors and Complementary SiC Bipolar Technology
KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.ORCID iD: 0000-0001-6459-749X
KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.ORCID iD: 0000-0002-5845-3032
KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.ORCID iD: 0000-0001-8108-2631
2014 (English)In: IEEE Electron Device Letters, ISSN 0741-3106, E-ISSN 1558-0563, Vol. 35, no 4, 428-430 p.Article in journal (Refereed) Published
Abstract [en]

Lateral p-n-p transistors and a complementary bipolar technology have been demonstrated for analog integrated circuits. Besides vertical n-p-n's, this technology provides lateral p-n-p's at the cost of one additional lithographic and dry etching step. Both devices share the same epitaxial layers and feature topside contacts to all terminals. The influence on p-n-p current gain of contact topology (circular versus rectangular), effective base width, base/emitter doping ratio, and temperature was studied in detail. In the range -40 degrees C to 300 degrees C, the current gain of the p-n-p transistor shows a maximum of similar to 37 around 0 degrees C and decreases to similar to 8 at 300 degrees C, whereas in the same range, the gain of n-p-n transistors exhibits a negative temperature coefficient.

Place, publisher, year, edition, pages
2014. Vol. 35, no 4, 428-430 p.
Keyword [en]
Bipolar junction transistor (BJT), silicon carbide (SiC), complementary bipolar, lateral PNP transistor, current gain temperature dependence, high and low temperature
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-144932DOI: 10.1109/LED.2014.2303395ISI: 000333521700002Scopus ID: 2-s2.0-84897916018OAI: oai:DiVA.org:kth-144932DiVA: diva2:716139
Funder
Swedish Foundation for Strategic Research
Note

QC 20140508

Available from: 2014-05-08 Created: 2014-05-05 Last updated: 2017-12-05Bibliographically approved
In thesis
1. Silicon Carbide BipolarTechnology for High Temperature Integrated Circuits
Open this publication in new window or tab >>Silicon Carbide BipolarTechnology for High Temperature Integrated Circuits
2014 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

The availability of integrated circuits (ICs) capable of 500 or 600° C operation can be extremely beneficial for many important applications, such as transportation and energy sector industry. It can in fact enable the realization of improved sensing and control of turbine engine combustion leading to better fuel efficiency and reduced pollution. In addition, the possibility of placing integrated circuits in engine hot-sections can significantly reduce the weight and improve the reliability of automobiles and aircrafts, eliminating extra wires and cooling systems.

In order to develop such electronics semiconductors with superior high temperature characteristics compared to Si are required. Thanks to its wide bandgap,  almost three times that of Si, Silicon carbide (SiC) has been suggested for this purpose. Its low intrinsic carrier concentration, orders of magnitude lower than that of Si, makes SiC devices capable of operating at much higher temperatures than Si devices.

In this thesis solutions for 600° C SiC bipolar ICs have been investigated in depth at device physics, circuit and process integration level. Successful operation of devices and circuits  has been proven from -40 up to 600° C.

The developed technology features NPN and lateral PNP transistors, two levels of interconnects and one extra metal level acting as over-layer metallization for device contacts. The improved SiC etching and passivation procedures have provided NPN transistors with high current gain of approximately 200. Furthermore, non-monotonous current gain temperature dependences have been observed for NPN and PNP transistors. The current gain of NPN transistors increases with temperature at high enough temperatures above 300° C  depending on the base doping concentration. The current gain of lateral PNP transistors has, instead, shown a maximum of approximately 37 around 0° C.

Finally, high-temperature operation of 2-input ECL-based OR-NOR gates and  3- and 11-stage ring oscillators has been demonstrated. For the OR-NOR gates stable noise margins of approximately 1 or 1.5 V, depending on the gate design, have been observed up to 600° C with a delay-power consumption product of approximately 100 nJ in the range -40 to 500° C.  Ring oscillators with different designs, including more than 100 devices, have been  successfully tested in the range 27 to 300° C. Non-monotonous and almost constant temperature dependences have been observed for the oscillation frequency of 3- and 11-stage ring oscillator, respectively. In addition, room temperature propagation delays of a single inverter stage have been estimated to be approximately 100 and 40 ns for 3- and 11-stage ring oscillators, respectively. 

Place, publisher, year, edition, pages
Stockholm: KTH Royal Institute of Technology, 2014. viii, 120 p.
Series
TRITA-ICT/MAP AVH, ISSN 1653-7610 ; 2014:07
Keyword
silicon carbide (SiC), bipolar junction transistor (BJT), current gain, surface passivation, SiC etching, complementary bipolar, lateral PNP, Darlington transistors, SPICE modeling, high-temperature, integrated circuits, emitter coupled logic (ECL)
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-145401 (URN)978-91-7595-135-5 (ISBN)
Public defence
2014-06-10, Sal D, Forum, Isafjordgatan 39, Kista, 10:00 (English)
Opponent
Supervisors
Note

QC 20140522

Available from: 2014-05-22 Created: 2014-05-19 Last updated: 2014-05-22Bibliographically approved

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Malm, Bengt GunnarZetterling, Carl-Mikael

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