Spiking brain models: Computation, memory and communication constraints for custom hardware implementation
2014 (English)In: 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC), IEEE , 2014, 556-562 p.Conference paper (Refereed)
We estimate the computational capacity required to simulate in real time the neural information processing in the human brain. We show that the computational demands of a detailed implementation are beyond reach of current technology, but that some biologically plausible reductions of problem complexity can give performance gains between two and six orders of magnitude, which put implementations within reach of tomorrow's technology.
Place, publisher, year, edition, pages
IEEE , 2014. 556-562 p.
, Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, 2014
Communication constraints, Computational capacity, Computational demands, Current technology, Neural information processing, Orders of magnitude, Performance Gain, Problem complexity
Electrical Engineering, Electronic Engineering, Information Engineering Bioinformatics (Computational Biology)
IdentifiersURN: urn:nbn:se:kth:diva-145421DOI: 10.1109/ASPDAC.2014.6742950ISI: 000350791700101ScopusID: 2-s2.0-84897858499ISBN: 978-147992816-3OAI: oai:DiVA.org:kth-145421DiVA: diva2:718319
2014 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014; Suntec; Singapore; 20 January 2014 through 23 January 2014
QC 201405202014-05-202014-05-202015-04-20Bibliographically approved