From Simulink to NoC-based MPSoC on FPGA
2014 (English)In: Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014, IEEE , 2014Conference paper (Refereed)
Network-on-chip (NoC) based multi-processor systems are promising candidates for future embedded system platforms. However, because of their complexity, new high level modeling techniques are needed to design, simulate and synthesize embedded systems targeting NoC-based MPSoC. Simulink is a popular modeling environment suitable to model at system level. However, there is no clear standard to synthesize Simulink models into SW and HW towards a NoC-based MPSoC implementation. In addition, many of the proposed solutions require large overhead in terms of SW components and memory requirements, resulting in complex and customized multi-processor platforms. In this paper we present a novel design flow to synthesize Simulink models onto a NoC-based MPSoC running on low-cost FPGAs. Our design flow constrains the MPSoC and the Simulink model to share a common semantics domain. This permits to reduce the need of resource consuming SW components, reducing the memory requirements on the platform. At the same time, performances (throughput) of dataflow applications can increase when the number of processors of the target platform is increased. This is shown through a case study on FPGA.
Place, publisher, year, edition, pages
IEEE , 2014.
embedded systems;field programmable gate arrays;integrated circuit design;integrated circuit modelling;network-on-chip;FPGA;NoC-based MPSoC;SW components;Simulink;common semantics domain;dataflow applications;design flow;embedded system;memory requirements;multiprocessor systems;network-on-chip;Computational modeling;Field programmable gate arrays;Mathematical model;Program processors;Prototypes;Semantics;Software packages
Engineering and Technology
IdentifiersURN: urn:nbn:se:kth:diva-145519DOI: 10.7873/DATE2014.341ISI: 000354965500328ScopusID: 2-s2.0-84903841109OAI: oai:DiVA.org:kth-145519DiVA: diva2:718493
Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014
QC 201406092014-05-212014-05-212015-08-18Bibliographically approved