NoC design for the soc of image process system of road mark recognition
2010 (English)In: Proceedings - International Conference on Electrical and Control Engineering, ICECE 2010, 2010, 3912-3916 p.Conference paper (Refereed)
With the analysis of basic properties, this paper proposed a SoC design of Image Process System of Road Mark Recognition (IPSRMR) based on data flow graph (DFG) model and generic regulable NoC (GRNoC). It is provided of properties of data transmission and timing for each resource module with building the system DFG model with analyzing functions and algorithm. The basic method for optimizing resources and mapping is shown by analyzing DFG model of the IPSRMR. Following the analysis results of DFG, the SoC for IPSRMR has optimized GRNoC architecture, achieves shortest data transmission paths among the resources, implements straight data transmission, increases the speed of data transmission, and reduced the requirement for data process speed of each resource. In addition, the power consumption is reduced with such a optimized architecture.
Place, publisher, year, edition, pages
2010. 3912-3916 p.
DFG, Image, NoC, SoC
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-150026DOI: 10.1109/iCECE.2010.1428ScopusID: 2-s2.0-79952223382ISBN: 978-076954031-3OAI: oai:DiVA.org:kth-150026DiVA: diva2:742258
International Conference on Electrical and Control Engineering, ICECE 2010, 26 June 2010 through 28 June 2010, Wuhan, China
QC 201409012014-09-012014-08-292014-09-01Bibliographically approved