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Polycrystalline indium phosphide on silicon by indium assisted growth in hydride vapor phase epitaxy
KTH, School of Information and Communication Technology (ICT), Materials- and Nano Physics, Semiconductor Materials, HMA.
KTH, School of Information and Communication Technology (ICT), Materials- and Nano Physics, Semiconductor Materials, HMA.ORCID iD: 0000-0002-8545-6546
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2014 (English)In: Journal of Applied Physics, ISSN 0021-8979, E-ISSN 1089-7550, Vol. 116, no 3, 033519- p.Article in journal (Refereed) Published
Abstract [en]

Polycrystalline InP was grown on Si(001) and Si(111) substrates by using indium (In) metal as a starting material in hydride vapor phase epitaxy (HVPE) reactor. In metal was deposited on silicon substrates by thermal evaporation technique. The deposited In resulted in islands of different size and was found to be polycrystalline in nature. Different growth experiments of growing InP were performed, and the growth mechanism was investigated. Atomic force microscopy and scanning electron microscopy for morphological investigation, Scanning Auger microscopy for surface and compositional analyses, powder X-ray diffraction for crystallinity, and micro photoluminescence for optical quality assessment were conducted. It is shown that the growth starts first by phosphidisation of the In islands to InP followed by subsequent selective deposition of InP in HVPE regardless of the Si substrate orientation. Polycrystalline InP of large grain size is achieved and the growth rate as high as 21 mu m/h is obtained on both substrates. Sulfur doping of the polycrystalline InP was investigated by growing alternating layers of sulfur doped and unintentionally doped InP for equal interval of time. These layers could be delineated by stain etching showing that enough amount of sulfur can be incorporated. Grains of large lateral dimension up to 3 mu m polycrystalline InP on Si with good morphological and optical quality is obtained. The process is generic and it can also be applied for the growth of other polycrystalline III-V semiconductor layers on low cost and flexible substrates for solar cell applications.

Place, publisher, year, edition, pages
2014. Vol. 116, no 3, 033519- p.
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-150938DOI: 10.1063/1.4890718ISI: 000340710500026Scopus ID: 2-s2.0-84904618616OAI: oai:DiVA.org:kth-150938DiVA: diva2:746180
Funder
Swedish Research CouncilVinnova
Note

QC 20140912

Available from: 2014-09-12 Created: 2014-09-11 Last updated: 2017-12-05Bibliographically approved

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Sun, YantingLourdudoss, Sebastian

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