Fabrication and characterization of silicon nanowires using STL for biosensing applications
2014 (English)In: INT CONF ULTI INTEGR, ISSN 2330-5738, 109-112 p.Article in journal (Refereed) Published
We present a sidewall transfer lithography (STL) process to fabricate silicon nanowires using the CMOS compatible materials SiO2, SiN and alpha-Si. The STL process is implemented using a single cluster tool for reactive ion etching (RIE) and plasma enhanced chemical vapor deposition (PECVD) with a maximum process temperature of 400 degrees C. Using three lithography masks, single and multiple silicon nanowires connected to contact areas can be defined. By optimizing layer thicknesses, RIE and deposition conformity we demonstrate wafer scale definition of 60 nm wide silicon nanowires using I-line stepper lithography. The silicon nanowires exhibit excellent characteristics for biosensing applications with subthreshold slopes of 75 mV/dec and a high on/off current ratio of more than 10(5).
Place, publisher, year, edition, pages
2014. 109-112 p.
nanowire, biosensing, SOI, CMOS, STL, step coverage, threshold voltage, subthreshold slope
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-153866DOI: 10.1109/ULIS.2014.6813928ISI: 000341731300028ScopusID: 2-s2.0-84901357181OAI: oai:DiVA.org:kth-153866DiVA: diva2:754111
15th International Conference on Ultimate Integration on Silicon (ULIS), APR 07-09, 2014, Stockholm, SWEDEN
QC 201410092014-10-092014-10-092014-10-09Bibliographically approved