Effective Workfunction Control in TmSiO/HfO2 high-k/metal gate stacks
2014 (English)In: INT CONF ULTI INTEGR, ISSN 2330-5738, 69-72 p.Article in journal (Refereed) Published
Integration of high-k interfacial layers in CMOS technology has been proposed to overcome the scaling limitations of the SiOx/HfO2 dielectric stack. Candidate high-k interfacial layers have to be compatible with strict requirements in terms of EOT, inversion layer mobility, threshold voltage control and device reliability. We have previously demonstrated a CMOS-compatible process for integration of thulium silicate (TmSiO) as interfacial layer, providing advantages in terms of EOT and channel mobility. This work demonstrates the compatibility of the TmSiO/HfO2 stack with the threshold voltage control techniques commonly employed in gate-last and gate-first integration schemes, namely the use of a dual-metal process and the integration of dielectric capping layers. We show that the flatband voltage can be set from -1V to +0.5V by proper choice of gate metal, while a shift of 150-400 mV is achievable by means of integration of Al2O3 or La2O3 capping layers.
Place, publisher, year, edition, pages
2014. 69-72 p.
TmSiO, thulium, HfO2, CMOS, interfacial layer, high-k
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-153864ISI: 000341731300018ScopusID: 2-s2.0-84901302996OAI: oai:DiVA.org:kth-153864DiVA: diva2:754130
15th International Conference on Ultimate Integration on Silicon (ULIS), APR 07-09, 2014, Stockholm, SWEDEN
QC 201410092014-10-092014-10-092014-10-09Bibliographically approved