A 1-V switched-opamp sample-and-hold circuit for wideband wireless communication
2008 (English)Conference paper (Refereed)
This paper presents a 1-V 10bit 50MSPS Switched-Opamp (SO) S/H circuit, designed in 3.3V/1.8V 0.18μm 1P6M CMOS technology, which could be used in wideband wireless transceivers. A new architecture of the low voltage switchable opamp with improved common-mode feed back (CMFB) loop is introduced for its fast wake-up speed. Simulation results show the S/H circuit achieves a THD of -75dB and a SFDR of 76dB at the Nyquist frequency (Fin = F s/2). The opamp only dissipates a static power of 1.9mW even in active phase.
Place, publisher, year, edition, pages
2008. 283-287 p.
, 2008 4th IEEE International Conference on Circuits and Systems for Communications, ICCSC
Analog to digital conversion, Circuit theory, Computer networks, Packet networks, International conferences, Nyquist frequencies, S/H circuits, Networks (circuits)
IdentifiersURN: urn:nbn:se:kth:diva-154433DOI: 10.1109/ICCSC.2008.66ScopusID: 2-s2.0-50649090039ISBN: 9781424417087OAI: oai:DiVA.org:kth-154433DiVA: diva2:758853
2008 4th IEEE International Conference on Circuits and Systems for Communications, ICCSC, 26-28 May 2008, Shanghai, China
QC 201410282014-10-282014-10-202014-10-28Bibliographically approved