Synthesizing Code for GPGPUs from Abstract Formal Models
2014 (English)In: Forum on specification and Design Languages (FDL), Munich, Germany, October 14-16, 2014 / [ed] Dr. Adam Morawiec and Jinnie Hinderscheit, IEEE conference proceedings, 2014Conference paper (Refereed)
Today multiple frameworks exist for elevating thetask of writing programs for GPGPUs, which are massively data-parallel execution platforms. These are needed as writing correctand high-performing applications for GPGPUs is notoriouslydifficult due to the intricacies of the underlying architecture.However, the existing frameworks lack a formal foundation thatmakes them difficult to use together with formal verification,testing, and design space exploration. We present in this papera novel software synthesis tool – called f2cc – which is capableof generating efficient GPGPU code from abstract formal modelsbased on the synchronous model of computation. These modelscan be built using high-level modeling methodologies that hidelow-level architecture details from the developer. The correctnessof the tool has been experimentally validated on models derivedfrom two applications. The experiments also demonstrate that thesynthesized GPGPU code yielded a 28× speedup when executedon a graphics card with 96 cores and compared against asequential version that uses only the CPU.
Place, publisher, year, edition, pages
IEEE conference proceedings, 2014.
Analytical models, computational modeling, system- level design, multicore processing
Research subject Computer Science
IdentifiersURN: urn:nbn:se:kth:diva-154842DOI: 10.1109/FDL.2014.7119363ScopusID: 2-s2.0-84940498062ISBN: 979-10-9227-04-7OAI: oai:DiVA.org:kth-154842DiVA: diva2:758857
Forum on specification and Design Languages(FDL),October 14-16, 2014 Munich, Germany
QC 201411172014-10-282014-10-282015-12-10Bibliographically approved