Integration of selective SiGe epitaxy for source/drain application in MOSFETs
2006 (English)In: Semiconductor Science and Technology, ISSN 0268-1242, E-ISSN 1361-6641, Vol. 22, no 1, 123-126 p.Article in journal (Refereed) Published
The integration of HCl chemical vapour etching and selective epitaxy by chemical vapour deposition of B-doped SiGe layers for recessed source/drain junction application has been studied. A temperature range of 850-900 degrees C is proposed to be suitable for the etch process in order to obtain a smooth Si surface. This point is crucial for the epitaxial quality of grown SiGe: B layers. The selectivity of the epitaxy was not as good for high B partial pressure. However, Si0.76Ge0.24 layers with a B concentration of 6 x 10(20) cm(-3) were selectively grown. The pattern dependence of the etch and epitaxy process was studied and a calibration of this versus Si coverage of the chip was performed.
Place, publisher, year, edition, pages
2006. Vol. 22, no 1, 123-126 p.
Other Materials Engineering
IdentifiersURN: urn:nbn:se:kth:diva-155412DOI: 10.1088/0268-1242/22/1/S29ISI: 000243752500030ScopusID: 2-s2.0-34247545235ISBN: 1424404614ISBN: 9781424404612OAI: oai:DiVA.org:kth-155412DiVA: diva2:765184
Third International SiGe Technology and Device Meeting, ISTDM 2006; Princeton, NJ; United States; 15 May 2006 through 17 May 2006
Updated from conference paper to article.
QC 201411212014-11-212014-11-052016-02-19Bibliographically approved