Minimal-power, delay-balanced smart repeaters for interconnects in the nanometer regime
2006 (English)In: Int. Workshop Syst. Level Interconnect Predict. SLIP, 2006, 113-120 p.Conference paper (Refereed)
In this paper we propose a smart repeater that consumes less energy and is suitable for driving global interconnections in nanometre technologies. When there is coupling between interconnects, the effective capacitance of a given wire is a function not only of the physical geometry, but also the relative switching pattern described by the bits on the wire in question (the victim) and the adjacent wires (aggressors). The drive strength of a traditional repeater is static, resulting in a spread of the propagation delay, with the repeater strength being essentially too much for every bit pattern other than the worst-case pattern. In the proposed SMART repeater, the drive strength is dynamically altered depending on the relative bit pattern, by partitioning it into a Main Driver and Assistant Driver. For a higher effective load capacitance both drivers switch, while for a lower effective capacitance the assistant driver is quiet. By disconnecting part of the repeater when it is not needed, the total load capacitance to the previous stage is reduced, resulting in reduced energy consumption for those instances. It is shown that the potential average saving in energy can be as much 15% with a 18% jitter reduction over a traditional repeater for typical global wire lengths in nanometre technologies.
Place, publisher, year, edition, pages
2006. 113-120 p.
, International Workshop on System Level Interconnect Prediction, SLIP, 2006
Delay-balanced, Interconnects, Minimal-power, Repeaters, Capacitance, Computational geometry, Energy utilization, Interconnection networks, Nanotechnology, Switching systems, Delay balanced, Global interconnections, Minimal power, Telecommunication repeaters
IdentifiersURN: urn:nbn:se:kth:diva-155966ScopusID: 2-s2.0-33750903686ISBN: 1595932550ISBN: 9781595932556OAI: oai:DiVA.org:kth-155966DiVA: diva2:766144
SLIP'06 - 2006 International Workshop on System Level Interconnect Prediction, 4-5 March 2006, Munich, Germany
QC 201411262014-11-262014-11-172014-11-26Bibliographically approved