SFG modeling for consistency checking of mixed-signal SoC
2005 (English)In: 2005 6th International Conference on ASIC Proceedings, 2005, 956-959 p.Conference paper (Refereed)
This paper described a modeling method for consistency checking of IP blocks used in design of a mixed-signal SoC (MS SoC). The consistency includes four points in the MS SoC design to guarantee the IP blocks suitable for applications. The four points are architecture matching, parameter matching, time matching, and frequency matching. Based on the signal flow graph (SFG), the MS SoC constructed by different IP blocks can be a signal processing system including analog part and digital part. After adding two new definitions on an edge function, which is used for the description of the parameter consistency, a set of nodes and edges function becomes the base of the checking model. The checking model can describe the consistency of the architecture and the parameter including time and frequency matching.
Place, publisher, year, edition, pages
2005. 956-959 p.
, ASICON 2005: 2005 6th International Conference on ASIC, Proceedings, 2
Computer hardware description languages, Integrated circuit layout, Mathematical models, Network protocols, Signal processing, Frequency matching, Mixed-signal SoC (MS SoC), Modeling methods, Parameter matching, Signal flow graph (SFG), Chip scale packages
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-156287ISI: 000235304100238ScopusID: 2-s2.0-33847299105ISBN: 0780392108ISBN: 9780780392106OAI: oai:DiVA.org:kth-156287DiVA: diva2:766964
ASICON 2005: 2005 6th International Conference on ASIC, 24 October 2005 through 27 October 2005, Shanghai, China
QC 201411282014-11-282014-11-262014-11-28Bibliographically approved