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Performance and network power evaluation of tightly mixed SRAM NUCA for 3D Multi-core Network on Chips
KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS. Nanjing University, China.
KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.ORCID iD: 0000-0003-0061-3475
KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
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2014 (English)In: 2014 IEEE International Symposium on Circuits and Systems (ISCAS), IEEE , 2014, 1961-1964 p.Conference paper, Published paper (Refereed)
Abstract [en]

Last level cache (LLC) is crucial for the performance of chip multiprocessors (CMPs), while power is a significant design concern for 3D CMPs. In this paper, we focus on the SRAM-based Non-Uniform Cache Architecture (NUCA) for 3D Multi-core Network-on-Chip (McNoC) systems. A tightly mixed SRAM NUCA for 3D mesh NoC is presented and analyzed. We evaluate the performance and network power with benchmarks based on a full system simulation framework. Experiment results on 16-core 3D NoC systems show that the tightly mixed NUCA could provide up to 31.71% and on average 5.95% performance improvement compared to a base 3D NUCA scheme. The tightly mixed 3D NUCA NoC can reduce network power consumption in 1.07%-15.74% and 9.64% on average compared to a baseline 3D NoCs. Our analysis and experimental results provide a guideline to design efficient 3D NoCs with stacking NUCA.

Place, publisher, year, edition, pages
IEEE , 2014. 1961-1964 p.
Series
Proceedings - IEEE International Symposium on Circuits and Systems, ISSN 0271-4310
Keyword [en]
3D Chip, Multi-core, NoC, NUCA
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-157968DOI: 10.1109/ISCAS.2014.6865546Scopus ID: 2-s2.0-84907403010ISBN: 978-147993432-4 (print)OAI: oai:DiVA.org:kth-157968DiVA: diva2:774158
Conference
2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014, 1 June 2014 through 5 June 2014, Melbourne, VIC, Australia
Note

QC 20141222

Available from: 2014-12-22 Created: 2014-12-18 Last updated: 2014-12-22Bibliographically approved

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Lu, Zhonghai

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  • apa
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