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Silicon synapse designs for VLSI neuromorphic platform
KTH, School of Information and Communication Technology (ICT), Electronic Systems. University of Turku, Finland .
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2014 (English)In: NORCHIP 2014 - 32nd NORCHIP Conference: The Nordic Microelectronics Event, IEEE , 2014, 7004745- p.Conference paper, Published paper (Refereed)
Abstract [en]

Analog silicon neurons were proven to be a promising solution for VLSI neuromorphic platform to implement massively scalable computing systems. They possess the advantages of consuming less power and silicon area than digitally designed neurons. This paper compares the differences in power and area consumption between two methods of synapse design for analog neuron models: time-based modulation and current-based modulation. The obtained results demonstrate that under the same technology process (ST CMOS 65nm), the neuron that uses time-based modulation consumes less power (almost six times) and silicon area (about thirty times) but higher energy (twelve times) than that of the current-based modulation.

Place, publisher, year, edition, pages
IEEE , 2014. 7004745- p.
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-160673DOI: 10.1109/NORCHIP.2014.7004745Scopus ID: 2-s2.0-84921529603ISBN: 9781479954421 (print)OAI: oai:DiVA.org:kth-160673DiVA: diva2:790893
Conference
32nd NORCHIP Conference, NORCHIP 2014, Tampere, Finland, 27 October 2014 through 28 October 2014
Note

QC 20150226

Available from: 2015-02-26 Created: 2015-02-26 Last updated: 2015-02-26Bibliographically approved

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CiteExportLink to record
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Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
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More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
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