Precise Clock Parameter Estimation and Ground Truth Capture for Clock Error Measurements using FPGAs
2014 (English)In: 2014 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication (ISPCS), IEEE , 2014, 83-86 p.Conference paper (Refereed)
In this extended abstract we discuss and propose a mechanism to estimate clock parameters between two clocks using TDC. Simultaneously, we have proposed a ground truth capture methodology for clock error measurements. In particular, we have proposed an accurate way of measuring clock phase ground truth at any instant in time using delay lines in FPGA. Accuracy of clock phase ground truth measurement can be up to 16 ps. We have estimated clock parameters from measurements and have compared it with clock ground truth obtained using suggested methods. Relative frequency errors are estimated with RMSE of 0.46 Hz and phase error is estimated with RMSE of 0.29 ns.
Place, publisher, year, edition, pages
IEEE , 2014. 83-86 p.
, IEEE International Symposium on Precision Clock Synchronization for Meaurement Control and Communication, ISSN 1949-0305
IdentifiersURN: urn:nbn:se:kth:diva-160809DOI: 10.1109/ISPCS.2014.6948696ISI: 000349106400015ScopusID: 2-s2.0-84913613198ISBN: 978-1-4799-2699-2OAI: oai:DiVA.org:kth-160809DiVA: diva2:791236
8th IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS), SEP 22-26, 2014, Austin, TX
QC 201502272015-02-272015-02-272015-02-27Bibliographically approved