Proportionally Fair Best Effort Flow Control in Network-on-Chip Architectures
2008 (English)In: IPDPS Miami 2008: Proceedings of the 22nd IEEE International Parallel and Distributed Processing Symposium, 2008Conference paper (Refereed)
The research community has recently witnessed the emergence of multi-processor system on chip (MPSoC) platforms consisting of a large set of embedded processors. Particularly, Interconnect networks methodology based on Network-on-Chip (NoC) in MP-SoC design is imminent to achieve high performance potential. More importantly, many well established schemes of networking and distributed systems inspire NoC design methodologies. Employing end-to-end congestion control is becoming more imminent in the design process of NoCs. This paper presents a centralized congestion scheme in the presence of both elastic and streaming flow traffic mixture. In this paper, we model the desired Best Effort (BE) source rates as the solution to a utility maximization problem which is constrained with link capacities while preserving Guaranteed Service (GS) traffics services requirements at the desired level. We proposed an iterative algorithm as the solution to the maximization problem which has the benefit of low complexity and fast convergence. The proposed algorithm may be implemented by a centralized controller with low computation and communication overhead.
Place, publisher, year, edition, pages
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-161078DOI: 10.1109/IPDPS.2008.4536499ScopusID: 2-s2.0-51049097478ISBN: 978-1-4244-1694-3OAI: oai:DiVA.org:kth-161078DiVA: diva2:793750
International Workshop on Performance Modeling, Evaluation, and Optimization of Ubiquitous Computing and Networked Systems ( PMEO UCNS)
QC 201503102015-03-092015-03-092015-03-10Bibliographically approved