Proportionally fair flow control mechanism for best effort traffic in network-on-chip architectures
2010 (English)In: International Journal of Parallel, Emergent and Distributed Systems, ISSN 1744-5760, E-ISSN 1744-5779, Vol. 25, no 4, 345-362 p.Article in journal (Refereed) Published
The research community has recently witnessed the emergence of multi-processor system on chip (MPSoC) platforms consisting of a large set of embedded processors. Particularly, Interconnect networks methodology based on network-on-chip (NoC) in MPSoC design is imminent to achieve high performance potential. More importantly, many well established schemes of networking and distributed systems inspire NoC design methodologies. Employing end-to-end congestion control is becoming more imminent in the design process of NoCs. This paper presents a centralised congestion control scheme in the presence of both elastic and streaming flow traffic mixture. We model the desired best effort source rates as the solution to an optimisation problem with weighted logarithmic objective which is known to admit proportional fairness criterion. The problem is constrained with link capacities while preserving guaranteed service traffics services requirements at the desired level. We propose an iterative algorithm as the solution to the optimisation problem which has the benefit of low complexity and fast convergence, and can be implemented by a controller unit with low computation and communication overhead.
Place, publisher, year, edition, pages
2010. Vol. 25, no 4, 345-362 p.
Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-161083DOI: 10.1080/17445760902894647ScopusID: 2-s2.0-77954610437OAI: oai:DiVA.org:kth-161083DiVA: diva2:793777
QC 201503102015-03-092015-03-092015-03-10Bibliographically approved