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Fine-grained runtime power budgeting for networks-on-chip
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2015 (English)In: 0th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, Institute of Electrical and Electronics Engineers (IEEE), 2015, 160-165 p.Conference paper (Refereed)
Abstract [en]

Power budgeting for NoC needs to be performed to meet limited power budget while assuring the best possible overall system performance. For simplicity and ease of implementation, existing NoC power budgeting schemes, irrespective of the fact that the packet arrival rates of different NoC routers may vary significantly, treat all the individual routers indiscriminately when allocating power to them. However, such homogeneous power allocation may provide excess power to routers with low packet arrival rates whereas insufficient power to those with high arrival rates. In this paper, we formulate the NoC power budgeting problem as to optimize the network performance over a power budget through per-router frequency scaling, taking into account of heterogeneous packet arrival rates across different routers as imposed by run time traffic dynamics. Correspondingly, we propose a fine-grained solution using an agile dynamic programming network with a linear time complexity. In essence, frequency of a router is set individually according to its contribution to the average network latency while meeting the power budget. Experimental results have confirmed that with fairly low runtime and hardware overhead, the proposed scheme can help save up to 50% application execution time when compared with the best existing methods.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2015. 160-165 p.
Keyword [en]
Analytical models, Dynamic programming, Electronic mail, Ports (Computers), Power demand, Runtime, System performance
National Category
Embedded Systems
Research subject
Electrical Engineering
URN: urn:nbn:se:kth:diva-162564DOI: 10.1109/ASPDAC.2015.7058998ISI: 000380442800041ScopusID: 2-s2.0-84926509826ISBN: 978-1-4799-7790-1OAI: diva2:797732
Design Automation Conference (ASP-DAC), 2015 20th Asia and South Pacific, Chiba, Japan, 19-22 January 2015

QC 20150407

Available from: 2015-03-25 Created: 2015-03-25 Last updated: 2016-09-19Bibliographically approved

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Daneshtalab, Masoud
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Electronics and Embedded Systems
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