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An Algorithm for Constructing a Smallest Register with Non-Linear Update Generating a Given Sequence
KTH, School of Information and Communication Technology (ICT), Electronics and Embedded Systems.
KTH, School of Information and Communication Technology (ICT), Electronics and Embedded Systems.ORCID iD: 0000-0001-7382-9408
2014 (English)In: Proceedings of IEEE International Symposium on Multiple-Valued Logic (ISMVL'2014), IEEE conference proceedings, 2014Conference paper, Published paper (Refereed)
Place, publisher, year, edition, pages
IEEE conference proceedings, 2014.
Keyword [en]
Sequence, NLSFR, non-linear
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-165590OAI: oai:DiVA.org:kth-165590DiVA: diva2:808622
Conference
International Symposium on Multiple-Valued Logic
Funder
Swedish Foundation for Strategic Research , SM12-0005
Note

QC 20150521

Available from: 2015-04-29 Created: 2015-04-29 Last updated: 2016-12-05Bibliographically approved

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Dubrova, Elena

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CiteExportLink to record
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