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Switching pulse pattern optimisation for modular multilevel converters
KTH, School of Electrical Engineering (EES), Electrical Energy Conversion. (High Power Electronics)ORCID iD: 0000-0001-8788-0415
KTH, School of Electrical Engineering (EES), Electrical Energy Conversion. (High Power Electronics)ORCID iD: 0000-0002-8565-4753
2014 (English)In: 40th Annual Conference of the IEEE Industrial Electronics Society, IECON 2014, 2014, 4722-4728 p.Conference paper, Published paper (Refereed)
Abstract [en]

Modular multilevel converters (MMCs) are widely used in different applications such as high voltage direct current (HVDC) applications. The HVDC station loss is highly related to the converter switching pulse pattern which is generated by modulation algorithm and cell selection methods. This paper formulates the switching pulse pattern generation, as a versatile optimisation problem. The problem constraints and objectives are formulated for HVDC applications and compared with similar problems in the field of computer science. To overcome the computational complexity in solving the introduced optimisation problem, a heuristic method is proposed for cell selection algorithm. The method utilizes the current level in order to obtain lossless switching at zero-current crossings. The study of the proposed method, in a time-domain simulation platform, shows that the method can reduce the switching converter losses by 60% compared to carrier-based modulation, maintaining the same capacitor voltage ripple. Although this paper focuses on HVDC, the mathematical model is applicable for any MMC application.

Place, publisher, year, edition, pages
2014. 4722-4728 p.
Keyword [en]
HVDC power convertors, PWM power convertors, computational complexity, heuristic programming, losses, optimisation, switching convertors, time-domain analysis, zero current switching, HVDC station loss, MMC application, capacitor voltage ripple, carrier-based PWM algorithm, cell selection methods, computational complexity, computer science, converter switching pulse pattern generation optimisation, current level utilization, heuristic method, high voltage direct current applications, mathematical model, modular multilevel converters, switching converter losses reduction, time-domain simulation platform, zero-current crossings, Capacitors, HVDC transmission, Optimization, Switches, Switching loss, Tin, Voltage control, HVDC transmission, Power conversion, Switching frequency, Switching loss
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Research subject
SRA - Energy
Identifiers
URN: urn:nbn:se:kth:diva-166461DOI: 10.1109/IECON.2014.7049214Scopus ID: 2-s2.0-84949928931OAI: oai:DiVA.org:kth-166461DiVA: diva2:811164
Conference
40th Annual Conference of the IEEE Industrial Electronics Society, IECON 2014, Oct. 29 2014-Nov. 1 2014, Dallas, TX
Funder
StandUp
Note

QC 20150512

Available from: 2015-05-11 Created: 2015-05-11 Last updated: 2015-05-12Bibliographically approved

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Hassanpoor, ArmanNorrga, Staffan

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