Design and Implementation of Multi-mode Routers for Large-scale Inter-core Networks
2016 (English)In: Integration, ISSN 0167-9260, E-ISSN 1872-7522, Vol. 53, 1-13 p.Article in journal (Other academic) Published
Constructing on-chip or inter-silicon (inter-die/inter-chip) networks to connect multiple processors extends the system capability and scalability. It is a key issue to implement a flexible router that can fit into various application scenarios. This paper proposes a multi-mode adaptable router that can support both circuit and wormhole switching with supplying flexible working strategies for specific traffic patterns in diverse applications. The limitation of mono-mode switched routers is shown at first, followed by algorithm exploration in the proposed router for choosing the proper working strategy in a specific network. We then present the performance improvement when applying the mixed circuit/wormhole switching mode to different applications, and analyze the image decoding as a case study. The multi-mode router has been implemented with different configurations in a 65 nm CMOS technology. The one with 8-bit flit width is demonstrated together with a multi-core processor to show the feasibility. Working at 350 MHz, the average power consumption of the whole system is 22 mW.
Place, publisher, year, edition, pages
Elsevier, 2016. Vol. 53, 1-13 p.
Engineering and Technology
IdentifiersURN: urn:nbn:se:kth:diva-169545DOI: 10.1016/j.vlsi.2015.10.002ISI: 000373551600001ScopusID: 2-s2.0-84960113542OAI: oai:DiVA.org:kth-169545DiVA: diva2:822110
QC 201604132015-06-162015-06-162016-05-03Bibliographically approved